# US 10,872,881 B2 · Microelectronic packages with high integration microelectronic dice stack > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,872,881 B2 - Document ID: US10872881B2 - Status: Granted - Kind: B2 - Application number: 16/818,961 - Filed: 2020-03-13 - Published: 2020-07-09 - Granted: 2020-12-22 - Earliest claimed: 2020-03-13 - Assignees: Intel IP Corporation - Applicants: Intel IP Corporation - Inventors: Richard Patten - Web page: https://patentgrep.com/patent/US10872881B2 ## CPC - H10W 90/00: Package configurations - H10W 20/42: Vias, e.g. via plugs - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/30: Die-attach connectors - H10W 72/90: Bond pads, in general - H10W 74/016: {using moulds} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 70/685: comprising multiple insulating layers - H10W 72/072: {of bump connectors} - H10W 72/07232: {Compression bonding, e.g. thermocompression bonding} - H10W 72/07233: {Ultrasonic bonding, e.g. thermosonic bonding} - H10W 72/07236: {Soldering or alloying} - H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/354: {comprising polymers} - H10W 72/856: {Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15)} - H10W 72/877: {Bump connectors and die-attach connectors} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape - H10W 90/28: the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/732: {between stacked chips} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A microelectronic package may include stacked microelectronic dice, wherein a first microelectronic die is attached to a microelectronic substrate, and a second microelectronic die is stacked over at least a portion of the first microelectronic die, wherein the microelectronic substrate includes a plurality of pillars extending therefrom, wherein the second microelectronic die includes a plurality of pillars extending therefrom in a mirror-image configuration to the plurality of microelectronic substrate pillars, and wherein the second microelectronic die pillars are attached to microelectronic substrate pillars with an attachment material. ## Claims ### Claim 1 A microelectronic package, comprising: a microelectronic substrate having a die attachment surface and a plurality of pillars extending from the microelectronic substrate die attachment surface; at least one first microelectronic die having an active surface and an opposing back surface, the at least one first microelectronic die attached by its active surface to the microelectronic substrate die attachment surface by a plurality of pillars of the at least one first microelectronic die and corresponding solder bumps on die attachment bond pads of the microelectronic substrate; at least one second microelectronic die extending over at least a portion of the at least one first microelectronic die and having a plurality of pillars extending from an active surface thereof, the active surface opposite a back surface, wherein each of the plurality of second microelectronic die pillars is attached to a respective microelectronic substrate pillar with an attachment material; and a mold material on the back surface of the at least one second microelectronic die. ### Claim 2 (depends on 1) The microelectronic package of claim 1, wherein the attachment material comprises a solder material. ### Claim 3 (depends on 1) The microelectronic package of claim 1, wherein the mold material encapsulates the first microelectronic die, the second microelectronic die, the plurality of microelectronic substrate pillars, the plurality of second microelectronic die pillars, and the attachment material. ### Claim 4 (depends on 1) The microelectronic package of claim 1, further including an adhesive material disposed between the first microelectronic die back surface and the second microelectronic die active surface. ### Claim 5 (depends on 1) The microelectronic package of claim 1, wherein the microelectronic substrate further includes an external connection surface opposing the microelectronic substrate die attachment surface and further including at least one external attachment interconnect attached to the microelectronic substrate external connection surface. ### Claim 6 (depends on 1) The microelectronic package of claim 1, wherein the at least one first microelectronic die is attached by its active surface to the microelectronic substrate die attachment surface with at least one interconnect. ### Claim 7 (depends on 1) The microelectronic package of claim 1, wherein the microelectronic substrate includes a plurality of second microelectronic die attachment bond pads and wherein the plurality of microelectronic substrate pillars are attached to the plurality of second microelectronic die attachment bond pads. ### Claim 8 (depends on 1) The microelectronic package of claim 1, wherein the second microelectronic die includes a plurality of bond pads and wherein the plurality of second microelectronic die pillars are attached to the plurality of second microelectronic die bond pads. ### Claim 9 A method of forming a microelectronic package, comprising: forming a microelectronic substrate having a die attachment surface and a plurality of pillars extending from the microelectronic substrate die attachment surface, wherein the plurality of pillars has an attachment material thereon; forming at least one first microelectronic die having an active surface and an opposing back surface; attaching the at least one first microelectronic die by the active surface thereof to the microelectronic substrate die attachment surface by a plurality of pillars of the at least one first microelectronic die and corresponding solder bumps on die attachment bond pads of the microelectronic substrate; forming at least one second microelectronic die having a plurality of pillars extending from an active surface thereof, the active surface opposite a back surface; attaching the at least one second microelectronic die to the microelectronic substrate, wherein each of the plurality of second microelectronic die pillars is attached to a respective microelectronic substrate pillar with the attachment material and wherein the at least one second microelectronic die extends over at least a portion of the at least one first microelectronic die; and disposing a mold material on the back surface of the at least one second microelectronic die. ### Claim 10 (depends on 9) The method of claim 9, wherein attaching the at least one second microelectronic die to the microelectronic substrate comprises attaching each of the plurality of second microelectronic die pillars to a respective microelectronic substrate pillar with an attachment material comprising a solder material. ### Claim 11 (depends on 9) The method of claim 9, wherein disposing the mold material encapsulates the first microelectronic die, the second microelectronic die, the plurality of microelectronic substrate pillars, the plurality of second microelectronic die pillars, and the attachment material. ### Claim 12 (depends on 9) The method of claim 9, further comprising disposing an adhesive material between the first microelectronic die back surface and the second microelectronic die active surface. ### Claim 13 (depends on 9) The method of claim 9, wherein the microelectronic substrate further includes an external connection surface opposing the microelectronic substrate die attachment surface and further including forming at least one external attachment interconnect on the microelectronic substrate external connection surface. ### Claim 14 (depends on 9) The method of claim 9, wherein attaching the at least one first microelectronic die by its active surface to the microelectronic substrate die attachment surface comprises attaching the at least one first microelectronic die by its active surface to the microelectronic substrate die attachment surface with at least one interconnect. ### Claim 15 (depends on 9) The method of claim 9, wherein forming the microelectronic substrate further comprises forming a plurality of second microelectronic die attachment bond pads in or on the microelectronic substrate die attachment surface and wherein the plurality of microelectronic substrate pillars are attached to the plurality of second microelectronic die attachment bond pads. ### Claim 16 (depends on 9) The method of claim 9, wherein forming the second microelectronic die further comprises forming a plurality of bond pads in or on the second microelectronic die active surface and wherein the plurality of second microelectronic die pillars are attached to the plurality of second microelectronic die bond pads. ### Claim 17 An electronic system, comprising: a board; and a microelectronic package on the board, wherein the microelectronic package comprises: a microelectronic substrate having a die attachment surface and a plurality of pillars extending from the microelectronic substrate die attachment surface; at least one first microelectronic die having an active surface and an opposing back surface, the at least one first microelectronic die attached by its active surface to the microelectronic substrate die attachment surface by a plurality of pillars of the at least one first microelectronic die and corresponding solder bumps on die attachment bond pads of the microelectronic substrate; at least one second microelectronic die extending over at least a portion of the at least one first microelectronic die and having a plurality of pillars extending from an active surface thereof, the active surface opposite a back surface, wherein each of the plurality of second microelectronic die pillars is attached to a respective microelectronic substrate pillar with an attachment material; and a mold material on the back surface of the at least one second microelectronic die. ### Claim 18 (depends on 17) The electronic system of claim 17, wherein the attachment material comprises a solder material. ### Claim 19 (depends on 17) The electronic system of claim 17, wherein the mold material encapsulates the first microelectronic die, the second microelectronic die, the plurality of microelectronic substrate pillars, the plurality of second microelectronic die pillars, and the attachment material. ### Claim 20 (depends on 17) The electronic system of claim 17, further including an adhesive material disposed between the first microelectronic die back surface and the second microelectronic die active surface.