# US 10,872,866 B2 · Semiconductor package and method of manufacturing the same

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- Number: US 10,872,866 B2
- Document ID: US10872866B2
- Status: Granted
- Kind: B2
- Application number: 16/154,490
- Filed: 2018-10-08
- Published: 2020-04-09
- Granted: 2020-12-22
- Earliest claimed: 2018-10-08
- Assignees: Advanced Semiconductor Engineering, Inc.
- Applicants: Advanced Semiconductor Engineering, Inc.
- Inventors: Jenchun Chen
- Web page: https://patentgrep.com/patent/US10872866B2

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10P 72/722: {Details of electrostatic chucks}
- H10W 42/276: {the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 74/01: Manufacture or treatment
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 90/00: Package configurations
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/9413: {on encapsulations}
- H10W 74/10: characterised by their shape or disposition
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor package including a substrate having a surface, and a conductive element on the first surface and electrically coupled to the substrate. The conductive element has a principal axis forming an angle less than 90 degrees with the surface.

## Claims

### Claim 1

A semiconductor package, comprising:
a substrate having a surface;
a conductive element on the surface and electrically coupled to the substrate, wherein the conductive element has a top surface facing away from the surface of the substrate and a lateral surface, and the conductive element has a principal axis forming an angle less than 90 degrees with the surface; and
an encapsulant surrounding the lateral surface of the conductive element and covering the surface of the substrate,
wherein a first portion of the top surface of the conductive element is covered by the encapsulant, and a second portion of the top surface of the conductive element is exposed from the encapsulant;
wherein the top surface and the lateral surface of the conductive element define a first corner adjacent to the first portion of the top surface and a second corner adjacent to the second portion of the top surface, wherein the second corner of the conductive element is exposed from the encapsulant.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, further comprising a conductive layer covering the second portion of the top surface and a sidewall of the encapsulant, and electrically coupled to the substrate through the conductive element.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, wherein the encapsulant has a height greater than a height of the conductive element.

### Claim 4 (depends on 1)

The semiconductor package of claim 1, wherein the conductive element comprises two conductive rods having different lengths.

### Claim 5 (depends on 4)

The semiconductor package of claim 4, further comprising an electronic component on the surface, one of the conductive rods being electrically coupled to the substrate through the electronic component.

### Claim 6 (depends on 1)

The semiconductor package of claim 1, wherein the conductive element tapers along the principal axis.

### Claim 7

A semiconductor package, comprising:
a substrate having a first surface;
a conductive element on the first surface, wherein the conductive element has a top surface facing away from the first surface of the substrate and a side surface; and
an encapsulant covering the side surface of the conductive element,
wherein a first portion of the top surface of the conductive element is covered by the encapsulant, and a second portion of the top surface of the conductive element is exposed from the encapsulant,
wherein a second surface passes through the conductive element and the encapsulant, the second surface is parallel to the first surface, and a shape of the conductive element on the second surface is elliptical;
wherein the top surface and the side surface of the conductive element define a first corner adjacent to the first portion of the top surface and a second corner adjacent to the second portion of the top surface, wherein the second corner of the conductive element is exposed from the encapsulant.

### Claim 8 (depends on 7)

The semiconductor package of claim 7, further comprising a conductive layer covering a top surface of the encapsulant and the second portion of the top surface of the conductive element.

### Claim 9 (depends on 8)

The semiconductor package of claim 8, wherein the top surface of the encapsulant is higher than the top surface of the conductive element.

### Claim 10 (depends on 9)

The semiconductor package of claim 9, wherein a portion of the conductive layer covers the conductive element and defines a kink.

### Claim 11 (depends on 9)

The semiconductor package of claim 9, wherein a portion of the conductive layer covers the conductive element and has a slanted surface.

### Claim 12 (depends on 7)

The semiconductor package of claim 7, wherein the conductive element comprises two conductive rods having different lengths.

### Claim 13 (depends on 12)

The semiconductor package of claim 12, further comprising an electronic component on the first surface, one of the conductive rods being electrically coupled to the substrate through the electronic component.

### Claim 14

A method for manufacturing a semiconductor package, comprising:
providing a substrate, the substrate having a surface; and
placing a conductive element having a principal axis on the surface of the substrate by performing processes that comprise:
picking the conductive element using an electrostatic force;
releasing the conductive element on a position on the surface of the substrate; and
forming an encapsulant on the surface of the substrate, wherein a first corner adjacent to a top surface of the conductive element is covered by the encapsulant and a second corner adjacent to the top surface of the conductive element is exposed from the encapsulant.

### Claim 15 (depends on 14)

The method of claim 14, wherein placing the conductive element on the surface of the substrate further comprises:
providing a patterned mask having an opening; and
passing the conductive element through the opening thereby disposing the conductive element at the position.

### Claim 16 (depends on 14)

The method of claim 14, further comprising:
disposing solder paste at the position on the surface of the substrate prior to placing the conductive element on the surface of the substrate; and
reflowing the solder paste.

### Claim 17 (depends on 14)

The method of claim 14, further comprising:
forming a conductive layer on the encapsulant and the top surface of the conductive element.

### Claim 18 (depends on 1)

The semiconductor package of claim 1, further comprising:
a bumping structure between the surface of the substrate and the conductive element, the bumping structure having an interface in contact with the conductive element.

### Claim 19 (depends on 1)

The semiconductor package of claim 1, further comprising a conductive layer covering the second corner of the conductive element.

### Claim 20 (depends on 19)

The semiconductor package of claim 19, wherein the conductive layer covers a portion of the lateral surface of the conductive element.