# US 10,872,865 B2 · Electric magnetic shielding structure in packages

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- Number: US 10,872,865 B2
- Document ID: US10872865B2
- Status: Granted
- Kind: B2
- Application number: 15/285,140
- Filed: 2016-10-04
- Published: 2017-01-26
- Granted: 2020-12-22
- Earliest claimed: 2013-03-12
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chen-Hua Yu; Shin-Puu Jeng; Der-Chyang Yeh; Hsien-Wei Chen; Jie Chen
- Web page: https://patentgrep.com/patent/US10872865B2

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10P 14/412: {Deposition of metallic or metal-silicide materials}
- H10P 72/74: {using temporarily an auxiliary support}
- H10W 20/062: {by smoothing of conductive parts, e.g. by planarisation}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- H10W 42/276: {the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation}
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 70/685: comprising multiple insulating layers
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 90/00: Package configurations
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10P 72/7432: {used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate}
- H10P 72/7436: {used to support a device or a wafer when forming electrical connections thereto}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 72/07207: {Temporary substrates, e.g. removable substrates}
- H10W 72/073: {of die-attach connectors}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/874: {On different surfaces}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A package includes a device die, a molding material molding the device die therein, and a through-via penetrating through the molding material. A redistribution line is on a side of the molding material. The redistribution line is electrically coupled to the through-via. A metal ring is close to edges of the package, wherein the metal ring is coplanar with the redistribution line.

## Claims

### Claim 1

A method comprising:
forming a plurality of conductive posts, the plurality of conductive posts comprising a first plurality of conductive posts and a second plurality of conductive posts;
encapsulating the plurality of conductive posts and a device die in an encapsulating material;
planarizing the plurality of conductive posts, the device die, and the encapsulating material;
forming a first plurality of conductive features on a first side of the encapsulating material, wherein the first plurality of conductive features comprises:
first portions electrically coupling to the device die; and
second portions electrically coupling to the plurality of conductive posts; and
forming a second plurality of conductive features on a second side of the encapsulating material, wherein the second plurality of conductive features comprises a conductive ring electrically coupling to the plurality of conductive posts; and
sawing the encapsulating material and overlying and underlying structures to form a package, wherein the first plurality of conductive posts comprises a corner conductive post at each corner of the package, and wherein each of the second plurality of conductive posts is between and aligned to two of the corner conductive posts.

### Claim 2 (depends on 1)

The method of claim 1 further comprising electrically grounding the conductive ring.

### Claim 3 (depends on 1)

The method of claim 1, wherein forming the second plurality of conductive features further comprises simultaneously forming a plurality of redistribution lines when the conductive ring is formed.

### Claim 4 (depends on 1)

The method of claim 1 further comprising forming a plurality of solder regions electrically coupling to the conductive ring.

### Claim 5 (depends on 1)

The method of claim 1 further comprising, wherein the conductive ring is formed, forming a conductive ring extension at a same level as the conductive ring, wherein the conductive ring extension is encircled by, and is connected to, the conductive ring.

### Claim 6 (depends on 1)

The method of claim 1 further comprising attaching a solder region vertically aligning to each of the corner conductive posts.

### Claim 7 (depends on 1)

The method of claim 1, wherein the second plurality of conductive posts is encapsulated in the encapsulating material and is electrically coupled to the conductive ring.

### Claim 8

A method comprising:
forming first conductive posts and second conductive posts over a substrate;
attaching a device die to the substrate, the second conductive posts being more proximal than the first conductive posts to the device die;
encapsulating the first conductive posts, the second conductive posts, and the device die in a molding material, a top surface of the molding material being level with the first conductive posts, the second conductive posts, and the device die; and
forming first conductive features, second conductive features, and third conductive features over the top surface of the molding material, the first conductive features being electrically coupled to the first conductive posts, the second conductive features electrically coupling the second conductive posts to the device die, and the third conductive features being electrically coupled to the device die.

### Claim 9 (depends on 8)

The method of claim 8 further comprising forming a first redistribution structure over the first conductive features, the second conductive features, and the third conductive features.

### Claim 10 (depends on 9)

The method of claim 9 further comprising forming under-bump metallurgies (UBMs) over the first redistribution structure.

### Claim 11 (depends on 10)

The method of claim 10, wherein the UBMs comprise a first UBM electrically coupled to one of the first conductive features, a second UBM electrically coupled to one of the second conductive features, and a third UBM electrically coupled to one of the third conductive features.

### Claim 12 (depends on 8)

The method of claim 8 further comprising forming a second redistribution structure over a bottom surface of the molding material, the bottom surface being opposite of the top surface.

### Claim 13 (depends on 12)

The method of claim 12, wherein the second redistribution structure comprises a continuous conductive ring, the continuous conductive ring electrically coupling one of the first conductive posts with another one of the first conductive posts.

### Claim 14 (depends on 13)

The method of claim 13, wherein in a plan view the continuous conductive ring overlaps each of the first conductive posts.

### Claim 15 (depends on 13)

The method of claim 13 further comprising electrically grounding the conductive ring.

### Claim 16

A method comprising:
forming a plurality of conductive posts over a first substrate, the plurality of conductive posts comprising inner conductive posts and outer conductive posts, the outer conductive posts forming a non-continuous rectangular ring, the outer conductive posts comprising corner posts being located at corners of the non-continuous rectangular ring, the outer conductive posts further comprising a side post being located between and aligned with each of the corner posts;
attaching a device die to the first substrate;
forming a molding compound around lateral edges of the plurality of conductive posts and the device die, the molding compound having a first side proximal to the first substrate and a second side opposite the first side;
forming a first plurality of conductive features over the second side of the molding compound;
removing the first substrate to expose the first side of the molding compound; and
forming a second plurality of conductive features over the molding compound, the second plurality of conductive features forming a continuous ring, the continuous ring being electrically coupled to each of the outer conductive posts.

### Claim 17 (depends on 16)

The method of claim 16 further comprising forming solder regions over the plurality of conductive posts.

### Claim 18 (depends on 17)

The method of claim 17, wherein the first plurality of conductive features comprises:
first conductive features electrically coupling the outer conductive posts to the solder regions;
second conductive features electrically coupling the inner conductive posts to the device die; and
third conductive features electrically coupling the device die to the solder regions.

### Claim 19 (depends on 18)

The method of claim 18, wherein the second conductive features are coupled to the solder regions.

### Claim 20 (depends on 17)

The method of claim 17, wherein the continuous ring is configured to be electrically grounded by one or more of the solder regions.