# US 10,872,813 B2 · Method of manufacturing semiconductor device

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- Number: US 10,872,813 B2
- Document ID: US10872813B2
- Status: Granted
- Kind: B2
- Application number: 16/722,321
- Filed: 2019-12-20
- Published: 2020-04-23
- Granted: 2020-12-22
- Earliest claimed: 2017-08-02
- Assignees: Renesas Electronics Corporation
- Applicants: Renesas Electronics Corporation
- Inventors: Mitsuhiro Sukegawa; Yoshinori Matsumuro; Toshikazu Hanawa; Kentaro Yamada
- Web page: https://patentgrep.com/patent/US10872813B2

## CPC

- H10W 20/031: {of conductive parts of the interconnections}
- H10P 14/46: using a liquid
- H10P 50/283: {by chemical means}
- H10W 20/0698: {Local interconnections}
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 72/00: Interconnections or connectors in packages
- H10P 14/44: Physical vapour deposition [PVD]
- H10W 72/019: {of bond pads}
- H10W 72/01935: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01938: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/01951: {Changing the shapes of bond pads}
- H10W 72/01953: {by etching}
- H10W 72/01955: {by using masks}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/9223: {with redistribution layers [RDL]}
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

To provide a semiconductor device capable of having improved adhesion between a plating film and a wiring layer. A method of manufacturing the semiconductor device includes a step of forming a wiring layer having a surface covered with an oxide film, a step of removing a portion of the oxide film by dry etching to form, in the oxide film, a first opening for exposing a portion of the wiring layer, a step of forming a passivation film covering the wiring layer, is provided with a second opening communicated with the first opening, and is made of an insulating resin material, and a step of growing a plating film on the wiring layer exposed from the first and second openings.

## Claims

### Claim 1

A method of manufacturing a semiconductor device comprising:
(a) patterning a wiring material by photolithography and etching, using a photoresist as an etching mask, thereby to form a wiring layer over a semiconductor substrate;
(b) after the step (a), removing the photoresist as the etching mask by ashing treatment, whereby an oxide film is formed on the wiring layer;
(c) after the step (b), forming a first passivation film of an inorganic material on the oxide film over the wiring layer, the first passivation film having an opening exposing a portion of the oxide film;
(d) after the step (c), removing the portion of the oxide film exposed from the opening of the first passivation film by dry etching, to form a first opening exposing a portion of the wiring layer in the oxide film;
(e) after the step (d), forming a second passivation film of an organic material on the first passivation film, the second passivation film having a second opening communicated with the first opening such that the first and second openings expose the portion of the wiring layer; and
(f) after the step (e), growing a plating film on the portion of the wiring layer exposed from the first opening and the second opening.

### Claim 2 (depends on 1)

The method of manufacturing a semiconductor device according to claim 1,
wherein the oxide film on the wiring layer is formed by oxidation due to the ashing treatment.

### Claim 3 (depends on 2)

The method of manufacturing a semiconductor device according to claim 2,
wherein the first passivation film is a silicon nitride film, and the second passivation film is a polyimide film.

### Claim 4 (depends on 3)

The method of manufacturing a semiconductor device according to claim 3,
wherein the dry etching in the step (d) is sputter etching.

### Claim 5 (depends on 4)

The method of manufacturing a semiconductor device according to claim 4,
wherein the plating film includes a nickel film and an Au film on the nickel film.