# US 10,872,775 B2 · Methods of plasma etching and plasma dicing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,872,775 B2 - Document ID: US10872775B2 - Status: Granted - Kind: B2 - Application number: 15/995,184 - Filed: 2018-06-01 - Published: 2018-12-06 - Granted: 2020-12-22 - Earliest claimed: 2017-06-05 - Assignees: SPTS Technologies Limited - Applicants: Spts Technologies Limited - Inventors: Oliver J Ansell; Martin Hanicinec; Janet Hopkins - Web page: https://patentgrep.com/patent/US10872775B2 ## CPC - H10P 50/244: {comprising alternated and repeated etching and passivation steps} - H10P 54/00: Cutting or separating of wafers, substrates or parts of devices - H10P 72/7402: {Wafer tapes, e.g. grinding or dicing support tapes} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method is for plasma etching one or more dicing lanes in a silicon substrate having a backside metal layer attached thereto. The method includes performing a main etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated to produce dicing lanes having scalloped sidewalls, and switching to performing a secondary etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated until the backside metal layer is reached. The amount of silicon removed in one etch step during the secondary etch is half or less than half of the amount of silicon removed in one etch step during the main etch. ## Claims ### Claim 1 A method of plasma etching one or more dicing lanes in a silicon substrate having a backside metal layer attached thereto, the method comprising the steps of: performing a main etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated to produce dicing lanes having scalloped sidewalls; and switching to performing a secondary etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated until the backside metal layer is reached; wherein the amount of silicon removed in one etch step during the secondary etch is half or less than half of the amount of silicon removed in one etch step during the main etch. ### Claim 2 (depends on 1) The method according to claim 1, wherein the amount of silicon removed in one etch step during the secondary etch is at least one fortieth of the amount of silicon removed in one etch step during the main etch. ### Claim 3 (depends on 1) The method according to claim 1, wherein the etch time of one etch step during the secondary etch is half or less than half of the etch time for one etch step during the main etch. ### Claim 4 (depends on 1) The method according to claim 1, wherein the etch time of one etch step during the secondary etch is at least one fortieth the etch time of one etch step during the main etch. ### Claim 5 (depends on 1) The method according to claim 1, wherein between the main etch and the secondary etch, the amount of silicon removed during each etch step is progressively reduced. ### Claim 6 (depends on 1) The method according to claim 1, wherein between the main etch and the secondary etch, the etch time of each etch step is progressively reduced. ### Claim 7 (depends on 1) The method according to claim 1, wherein the etch time of one etch step during the secondary etch is 1.5 seconds or less, preferably 1 second or less. ### Claim 8 (depends on 1) The method according to claim 1, wherein the secondary etch begins before the main etch reaches the backside metal layer. ### Claim 9 (depends on 8) The method according to claim 8, wherein the secondary etch begins when the main etch reaches a distance of about 60 μm or less from the backside metal layer. ### Claim 10 (depends on 1) The method according to claim 1, wherein a plurality of intersecting dicing lanes are to be etched, and switching to the secondary etch occurs when the dicing lane intersections reach the backside metal layer. ### Claim 11 (depends on 1) The method according to claim 1 further comprising: after performing the secondary etch, performing a smoothing step to reduce scalloping, wherein the smoothing step comprises exposing the sidewalls of each dicing lane to an anisotropic plasma etch which at least partially etches the scallops to provide smoothed sidewalls. ### Claim 12 (depends on 11) A method according to claim 11 in which the anisotropic plasma etch uses a plasma generated with fluorine-containing gas. ### Claim 13 (depends on 12) A method according to claim 12 in which the fluorine-containing gas is SF6. ### Claim 14 (depends on 12) A method according to claim 12 in which the plasma is generated in a gaseous mixture comprising the fluorine-containing gas and an inert gas, preferably argon. ### Claim 15 (depends on 11) A method according to claim 11 in which the anisotropic plasma etch uses a RF bias having a RF power of 500 W or more. ### Claim 16 (depends on 11) A method according to claim 11 in which the anisotropic plasma etch uses a plasma generated with a RF signal having a RF power of 3000 W or more. ### Claim 17 (depends on 1) A method of plasma dicing a silicon substrate having a backside metal layer attached thereto, the method comprising: performing the method of plasma etching of claim 1; and singulating the substrate into one or more dies along the dicing lanes. ### Claim 18 A method of plasma etching one or more dicing lanes in a silicon substrate having a backside metal layer attached thereto, the method comprising the steps of: performing a main etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated until the backside metal layer is reached, the main etch producing scalloped sidewalls; performing a smoothing step to reduce scalloping, wherein the smoothing step comprises exposing the sidewalls of each dicing lane to an anisotropic plasma etch which at least partially etches the scallops to provide smoothed sidewalls.