# US 10,872,727 B2 · Multilayer ceramic capacitor including dielectric layers having improved reliability

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- Number: US 10,872,727 B2
- Document ID: US10872727B2
- Status: Granted
- Kind: B2
- Application number: 16/279,188
- Filed: 2019-02-19
- Published: 2020-02-13
- Granted: 2020-12-22
- Earliest claimed: 2018-08-09
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Applicants: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Kum Jin Park; Kwang Hee Nam; Young Bin Jeong; Myung Woo Lee; Jong Han Kim
- Web page: https://patentgrep.com/patent/US10872727B2

## CPC

- H01G 4/1227: {based on alkaline earth titanates}
- H01G 4/012: Form of non-self-supporting electrodes
- H01G 4/30: Stacked capacitors (H01G4/33 takes precedence)
- H01G 4/12: Ceramic dielectrics {(H01G4/085 takes precedence)}
- H01G 4/224: Housing; Encapsulation
- H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10)

## Abstract

A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.

## Claims

### Claim 1

A multilayer ceramic capacitor comprising:
a ceramic body including dielectric layers including Ti and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and
first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively,
wherein the dielectric layers include dielectric grains, and a grain boundary is present between at least two dielectric grains of the dielectric grains,
wherein the dielectric layers include:
a first accessory component containing an oxide or a carbonate containing at least one of Mn, V, Cr, Fe, Ni, Co, Cu or Zn, the first accessory component having a content of 0.05 to 2.0 mol % based on 100 mol % of Ti contained in the dielectric layers,
a second accessory component containing an oxide or a carbonate containing Mg, the second accessory component having a content of 0.0 to 2.0 mol % based on 100 mol % of the Ti contained in the dielectric layers,
a third accessory component containing an oxide or a carbonate containing at least one of Y, Dy, Ho, Er, Gd, Ce, Nd, Pm, Eu, Tb, Tm, Yb, Lu or Sm, the third accessory component having a content of 0.0 to 4.0 mol % based on 100 mol % of the Ti contained in the dielectric layers,
a fourth accessory component containing an oxide or a carbonate containing Ba, the fourth accessory component having a content of 0.0 to 4.15 mol % based on 100 mol % of the Ti contained in the dielectric layers,
a fifth accessory component containing an oxide or a carbonate containing at least one of Ca or Zr, the fifth accessory component having a content of 0.0 to 20.0 mol % based on 100 mol % of the Ti contained in the dielectric layers, and
a sixth accessory component containing an oxide containing at least one of Si or Al, or a glass compound containing Si, the sixth accessory component having a content of 0.0 to 4.0 mol % based on 100 mol % of the Ti contained in the dielectric layers,
a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%, and
wherein the first and second internal electrodes have a thickness of 0.4 μm or less.

### Claim 2 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the grain boundary has a thickness of 1.5 nm to 5 nm.

### Claim 3 (depends on 2)

The multilayer ceramic capacitor of claim 2, wherein the dielectric layer has a thickness of 0.4 μm or less.

### Claim 4 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the dielectric grain has a core-shell structure.

### Claim 5 (depends on 4)

The multilayer ceramic capacitor of claim 4, wherein the grain boundary has a thickness of 0.2 nm to 5 nm.

### Claim 6 (depends on 4)

The multilayer ceramic capacitor of claim 4, wherein in the dielectric grain, the Si/Ti mole ratio increases from the core toward the shell and the grain boundary.

### Claim 7 (depends on 4)

The multilayer ceramic capacitor of claim 4, wherein the Si/Ti mole ratio in the core is less than 1%.

### Claim 8 (depends on 4)

The multilayer ceramic capacitor of claim 4, wherein the Si/Ti mole ratio in the shell is less than 5%.

### Claim 9 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the ceramic body includes an active portion including the first and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween, and cover portions disposed on upper and lower parts of the active portion, respectively.

### Claim 10 (depends on 9)

The multilayer ceramic capacitor of claim 9, wherein the Si/Ti mole ratio of the grain boundary of the dielectric grain included in the dielectric layers in the cover portions is higher than the Si/Ti mole ratio of the grain boundary of the dielectric grain included in the dielectric layers in the active portion.

### Claim 11 (depends on 9)

The multilayer ceramic capacitor of claim 9, wherein the Si/Ti mole ratio of the grain boundary of the dielectric grain included in the dielectric layers in the cover portions is 15% to 50%.

### Claim 12 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the dielectric layer includes Si having a size of 10 nm or less.

### Claim 13 (depends on 1)

The multilayer ceramic capacitor of claim 1, wherein the grain boundary has a thickness of 0.2 nm to 5 nm.