# US 10,872,675 B2 · Storage device monitoring and storing on cell counts of blocks and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,872,675 B2 - Document ID: US10872675B2 - Status: Granted - Kind: B2 - Application number: 16/448,545 - Filed: 2019-06-21 - Published: 2020-05-14 - Granted: 2020-12-22 - Earliest claimed: 2018-11-14 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Hyunkyo Oh; Sangkwon Moon - Web page: https://patentgrep.com/patent/US10872675B2 ## CPC - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/3404: {Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G11C 11/5628: {Programming or writing circuits; Data input circuits} - G11C 11/5642: {Sensing or reading circuits; Data output circuits} - G11C 16/0466: {comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] (G11C16/0483, G11C16/0491 take precedence)} - G11C 16/16: for erasing blocks, e.g. arrays, words, groups - G11C 16/3427: {Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written} - G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically} - G11C 29/50004: {of threshold voltage} - G06F 2212/1028: Power efficiency - G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc - G06F 2212/7202: Allocation control and policies - G06F 2212/7206: Reconfiguration of flash memory system - G11C 2029/0409: {Online test} - G11C 2029/1202: {Word line control} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G11C: STATIC STORES (semiconductor memory devices H10B) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A storage device includes a non-volatile memory including a plurality of blocks, a buffer memory, and a controller that stores an on-cell count in the buffer memory, the on-cell count indicating a number of memory cells, which are turned on by a read level applied to a reference word line of each of the plurality of blocks, from among memory cells connected to the reference word line. ## Claims ### Claim 1 A storage device comprising: a non-volatile memory comprising a plurality of blocks; a plurality of word lines arranged in each of the plurality of blocks; a buffer memory; and a controller configured to store an on-cell count in the buffer memory, the on-cell count indicating a number of memory cells, which are turned on by a read level applied to a reference word line, from among memory cells connected to the reference word line, wherein one of the plurality of word lines is selected as the reference word line based on vector-based similarities between the plurality of word lines. ### Claim 2 (depends on 1) The storage device of claim 1, wherein the memory cells that are turned on by the read level have threshold voltages that are lower than the read level. ### Claim 3 (depends on 1) The storage device of claim 1, wherein the controller is configured to store the on-cell count in the buffer memory without a request of a host. ### Claim 4 (depends on 1) The storage device of claim 1, wherein the controller is further configured to transmit a first command for acquiring the on-cell count and a second command corresponding to a request of a host to the non-volatile memory, and a first latency for the non-volatile memory to output first read data in response to the first command is shorter than a second latency for the non-volatile memory to output second read data in response to the second command. ### Claim 5 (depends on 1) The storage device of claim 1, wherein the reference word line is selected depending on sums of the vector-based similarities between the plurality of word lines, and a sum of vector-based similarities between the one of the plurality of word lines selected as the reference word line and remaining word lines among the plurality of word lines is maximum among the sums of vector-based similarities between the plurality of word lines. ### Claim 6 (depends on 1) The storage device of claim 1, wherein the plurality of blocks comprise a first block and a second block, and a first location of a first reference word line of the first block is identical to a second location of a second reference word line of the second block. ### Claim 7 (depends on 1) The storage device of claim 1, wherein the read level is within a range of threshold voltage levels of the memory cells. ### Claim 8 (depends on 1) The storage device of claim 1, wherein the read level is a first read level, and the on-cell count is a first on-cell count, and the controller is further configured to store a second on-cell count in the buffer memory, the second on-cell count indicating a number of memory cells, which are turned on by a second read level applied to the reference word line, from among the memory cells connected to the reference word line, the second read level being different from the first read level. ### Claim 9 (depends on 8) The storage device of claim 8, wherein the first read level for acquiring the first on-cell count is determined according to a correlation with lower read levels among a plurality of read levels for determining data of the memory cells connected to the reference word line, and the second read level for acquiring the second on-cell count is determined according to a correlation with upper read levels among the plurality of read levels. ### Claim 10 (depends on 1) The storage device of claim 1, wherein each of the plurality of blocks corresponds to a unit by which the controller erases data of memory cells of the non-volatile memory. ### Claim 11 A storage device comprising: a non-volatile memory comprising a plurality of blocks; a plurality of word lines arranged in each of the plurality of blocks; a buffer memory; and a controller configured to, periodically read memory cells connected to a reference word line by applying a read level to the reference word line, periodically update an on-cell count in the buffer memory, the on-cell count indicating a number of memory cells, which are turned on by applying the read level to the reference word line, from among the memory cells connected to the reference word line, wherein one of the plurality of word lines is selected as the reference word line based on vector-based similarities between the plurality of word lines. ### Claim 12 (depends on 11) The storage device of claim 11, wherein the controller is further configured to compare a new on-cell count indicating a number of memory cells, which are turned on by applying the read level to the reference word line after the on-cell count is stored in the buffer memory, from among the memory cells connected to the reference word line, with the on-cell count stored in the buffer memory. ### Claim 13 (depends on 12) The storage device of claim 12, wherein the controller is further configured to store the new on-cell count in the buffer memory, instead of the on-cell count stored in the buffer memory, in response to a difference between the new on-cell count and the on-cell count stored in the buffer memory being greater than a threshold value. ### Claim 14 (depends on 12) The storage device of claim 12, wherein the controller is further configured to adjust an update period for monitoring the on-cell count, in response to a sum of differences between the new on-cell count and the on-cell count stored in the buffer memory for each of the plurality of blocks being less than a threshold value. ### Claim 15 (depends on 11) The storage device of claim 11, wherein an update period for monitoring the on-cell count is a value determined in advance. ### Claim 16 (depends on 11) The storage device of claim 11, wherein the buffer memory includes a dynamic random access memory (DRAM), a static random access memory (SRAM), or a tightly coupled memory (TCM). ### Claim 17 An operating method of a storage device, which includes a non-volatile memory comprising a plurality of blocks, a plurality of word lines arranged in each of the plurality of blocks, a buffer memory, and a controller, the method comprising: selecting reference word lines from the plurality of word lines arranged in each of the plurality of blocks based on vector-based similarities between the plurality of word lines; sequentially monitoring, by the controller, on-cell counts of the plurality of blocks by reading memory cells connected to the reference word lines of the plurality of blocks of the non-volatile memory by applying a read level to the reference word lines; and storing, by the controller, the on-cell counts of the plurality of blocks in the buffer memory, the on-cell counts indicating a number of memory cells, which are turned on by applying the read level to the reference word lines, from among the memory cells connected to the reference word lines. ### Claim 18 (depends on 17) The method of claim 17, further comprising: receiving, by the controller, a request from a host communicating with the storage device; and processing, by the controller, the request of the host before performing the sequential monitoring of the on-cell counts and the storing of the on-cell counts in the buffer memory. ### Claim 19 (depends on 17) The method of claim 17, wherein an order in which the controller accesses the plurality of blocks to perform the sequential monitoring of the on-cell counts by applying the read level to the reference word lines is determined in advance. ### Claim 20 (depends on 17) The method of claim 17, further comprising: sequentially monitoring, by the controller, new on-cell counts of the plurality of blocks by reading the memory cells connected to the reference word lines by applying the read level to the reference word lines after storing the on-cell counts in the buffer memory; and storing, by the controller, the new on-cell counts of the plurality of blocks in the buffer memory, the new on-cell counts indicating a number of memory cells, which are turned on by applying the read level to the reference word lines after storing the on-cell counts in the buffer memory, from among the memory cells connected to the reference word lines.