# US 10,872,553 B2 · Integrated circuit for nonlinear data encoding

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- Number: US 10,872,553 B2
- Document ID: US10872553B2
- Status: Granted
- Kind: B2
- Application number: 16/396,366
- Filed: 2019-04-26
- Published: 2019-08-15
- Granted: 2020-12-22
- Earliest claimed: 2015-10-07
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: David M. Hoffman
- Web page: https://patentgrep.com/patent/US10872553B2

## CPC

- G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)}
- G06F 3/14: Digital output to display device {; Cooperation and interconnection of the display device with other functional units}
- G06T 1/60: Memory management
- G09G 3/2007: {Display of intermediate tones}
- G09G 5/393: Arrangements for updating the contents of the bit-mapped memory
- H04N 19/42: characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation (H04N19/635 takes precedence)
- G09G 2320/0242: Compensation of deficiencies in the appearance of colours
- G09G 2320/0271: Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
- G09G 2320/0276: for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
- G09G 2320/0666: for control of colour parameters, e.g. colour temperature
- G09G 2340/0428: Gradation resolution change
- G09G 2350/00: Solving problems of bandwidth in display systems
- G09G 2360/122: Tiling
- G09G 2360/16: Calculation or use of calculated indices related to luminance levels in display data
- H04N 19/126: Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A method of image processing, the method including performing linear processing of an input data signal encoded with a nonlinear function to generate a linear representation of the input data signal including linearized image data, and using an integrated circuit to generate a processed linear image by nonlinearly quantizing the linearized image data to generate nonlinear quantized data, generating a memory address based on the nonlinear quantized data, and accessing a lookup table based on the generated memory address.

## Claims

### Claim 1

A method of nonlinear encoding, the method comprising:
receiving a linearized data;
identifying a data block of a plurality of data blocks that contains the linearized data, wherein each data block corresponds to a boundary slice, an offset, and a block bit shift;
bit-shifting the linearized data according to the block bit shift of the data block to generate most significant bits;
bit shifting the boundary slice of a previous data block according to the block bit shift to generate a boundary slice offset; and
generating a nonlinear quantized data according to the most significant bits, the offset, and the boundary slice offset.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
receiving an image data encoded with a nonlinear function; and
performing linear processing on the image data to generate the linearized data.

### Claim 3 (depends on 2)

The method of claim 2, further comprising performing image processing on the linearized data.

### Claim 4 (depends on 3)

The method of claim 3, wherein the image processing comprises adjusting at least one of a color, contrast, and brightness of the linearized data.

### Claim 5 (depends on 1)

The method of claim 1, wherein generating the nonlinear quantized data comprises summing the most significant bits with the offset, and subtracting the boundary slice offset.

### Claim 6 (depends on 1)

The method of claim 1, further comprising generating a memory address based on the nonlinear quantized data; and retrieving an output value from a lookup table that is located at the memory address.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
calculating an error of the output value; and
modifying at least one of the boundary slice, offset, and block bit shift when the error of the output value exceeds an error tolerance.

### Claim 8

A compressive lookup table implemented by:
at least one register for storing a boundary slice, a block bit shift, and an offset for each data block of a plurality of data blocks;
a compressive addressing computation processor configured to receive a linearized input data and to perform a quantization function on the linearized input data,
wherein performing a quantization function on the linearized input data comprises:
identifying a data block from the plurality of data blocks that contains the linearized input data;
bit-shifting the linearized input data according to a block bit shift of the data block to generate most significant bits;
bit-shifting the boundary slice of a previous data block according to the block bit shift to generate a boundary slice offset; and
generating a nonlinear quantized data according to the most significant bits, the offset, and the boundary slice offset.

### Claim 9 (depends on 8)

The compressive lookup table of claim 8, wherein generating the nonlinear quantized data comprises summing the most significant bits with the offset, and subtracting the boundary slice offset.

### Claim 10 (depends on 8)

The compressive lookup table of claim 8 comprising a lookup table for storing a plurality of output values at a plurality of memory addresses, the compressive lookup table further being implemented by a memory controller configured to access plurality of memory addresses of the lookup table to retrieve an output value.

### Claim 11 (depends on 10)

The compressive lookup table of claim 10, wherein performing a quantization function on the linearized input data further comprises generating a memory address based on the nonlinear quantized data.

### Claim 12 (depends on 11)

The compressive lookup table of claim 11, wherein the memory controller is configured to retrieve the output value from the lookup table using the memory address.

### Claim 13 (depends on 12)

The compressive lookup table of claim 12, wherein the lookup table is configured to:
calculate an error of the output value; and
modify at least one of the boundary slice, offset, and block bit shift for the data block when the error of the output value exceeds an error tolerance.

### Claim 14 (depends on 11)

The compressive lookup table of claim 11, wherein the compressive lookup table is further implemented by an integrated circuit.

### Claim 15 (depends on 14)

The compressive lookup table of claim 14, wherein the integrated circuit comprises a single memory cell corresponding to the lookup table.

### Claim 16 (depends on 15)

The compressive lookup table of claim 15, wherein the single memory cell is reprogrammable.

### Claim 17 (depends on 8)

The compressive lookup table of claim 8, wherein the at least one register comprises:
a boundary slice register for determining a boundary of the data block of the linearized input data corresponding to the linearized input data;
a block bit shift register for determining a block bit shift corresponding to the data block; and
an offset register for determining an offset corresponding to the data block.

### Claim 18

A method of image processing comprising:
receiving an input image data encoded with a nonlinear function;
generating a linearized image data by performing linear processing on the input image data; and
retrieving an output value associated with the linearized image data,
wherein the retrieving the output value comprises:
determining a data block of a plurality of data blocks that contains the linearized image data wherein each data block of the plurality of data block corresponds to a boundary slice, a block bit shift, and an offset;
dividing the linearized image data according to the block bit shift corresponding to the data block to generate most significant bits;
dividing the boundary slice of an adjacent data block by the block bit shift to generate a boundary slice offset;
calculating a memory address by subtracting boundary slice offset from the most significant bits and adding an offset of the data block; and
retrieving the output value from the memory address.

### Claim 19 (depends on 18)

The method of claim 18, further comprising performing image processing on the linearized image data by adjusting at least one of a color, contrast, and brightness of the linearized image data.

### Claim 20 (depends on 18)

The method of claim 18, further comprising:
calculating an error of the output value; and
modifying at least one of the boundary slice, offset, and block bit shift when the error of the output value exceeds an error tolerance.
