# US 10,872,008 B2 · Data recovery after storage failure in a memory system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,872,008 B2 - Document ID: US10872008B2 - Status: Granted - Kind: B2 - Application number: 16/016,456 - Filed: 2018-06-22 - Published: 2019-12-26 - Granted: 2020-12-22 - Earliest claimed: 2018-06-22 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: James P. Crowley; Michael W. Sheperek - Web page: https://patentgrep.com/patent/US10872008B2 ## CPC - G06F 11/0793: {Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40)} - G06F 11/0727: {in a storage system, e.g. in a DASD or network based storage system (drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097)} - G06F 11/0751: {Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06)} - G06F 11/0787: {Storage of error reports, e.g. persistent data storage, storage using memory protection} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Exemplary methods, apparatuses, and systems include a memory controller receiving a first physical address corresponding to a logical address and data and initiating storage of the data at the first physical address. The memory controller sends a message indicating that the data has been successfully stored at the first physical address before determining if the data was successfully stored at the first physical address. Upon determining that the data failed to store at the first physical address, the memory controller retrieves the data from a volatile memory associated with the first physical address. The memory controller sends a request and receives a second physical address for the retrieved data. The memory controller initiates storage of the data at the second physical address. ## Claims ### Claim 1 A computer-implemented method, comprising: receiving a first physical address and a data, wherein the first physical address corresponds to a logical address; initiating storage of the data at the first physical address in a first of a plurality of non-volatile memory dice of a memory subsystem by sending the data to the first non-volatile memory die, wherein each of the plurality of non-volatile memory dice includes volatile storage and non-volatile storage, and wherein the first non-volatile memory die temporarily stores the data in the volatile storage of the first non-volatile memory die while writing to the non-volatile storage of the first non-volatile memory die; sending a message indicating that the data has been successfully stored in the first non-volatile memory die, wherein the message is sent before determining whether or not the data was successfully stored in the non-volatile storage of the first non-volatile memory die; retrieving the data from the volatile storage of the first non-volatile memory die in response to determining that storage of the data at the first physical address in the non-volatile memory die has failed; sending a request for a second physical address in response to determining that storage of the data at the first physical address has failed, wherein the request includes the first physical address; receiving a second physical address corresponding to the logical address; and storing the data at the second physical address in one of the plurality of non-volatile memory dice. ### Claim 2 (depends on 1) The method of claim 1, wherein the volatile storage is a cache register. ### Claim 3 (depends on 1) The method of claim 1, wherein data retrieved from the volatile storage is stored in a buffer of another volatile storage reserved for write failures. ### Claim 4 (depends on 1) The method of claim 1, wherein one or more blocks of non-volatile storage at the first physical address are retired from use. ### Claim 5 (depends on 1) The method of claim 1, wherein the first physical address is stored in a controller memory until the data is successfully stored in the non-volatile memory die. ### Claim 6 (depends on 5) The method of claim 5, wherein a mapping between the first physical address and the data is stored in the controller memory. ### Claim 7 (depends on 6) The method of claim 6, wherein the request for the second physical address is generated using the mapping between the first physical address and the data. ### Claim 8 (depends on 1) The method of claim 1, further comprising: mapping the first physical address to the logical address in an address translation data structure; and updating the address translation data structure to replace the first physical address with the second physical address. ### Claim 9 A non-transitory machine-readable storage medium storing instructions, which when executed by a processing device, cause the processing device to perform a method comprising: receiving a first physical address and a data, wherein the first physical address corresponds to a logical address; initiating storage of the data at the first physical address in a first of a plurality of non-volatile memory dice of a memory subsystem by sending the data to the first non-volatile memory die, wherein each of the plurality of non-volatile memory dice includes volatile storage and non-volatile storage, and wherein the first non-volatile memory die temporarily stores the data in the volatile storage of the first non-volatile memory die while writing to the non-volatile storage of the first non-volatile memory die; sending a message indicating that the data has been successfully stored in the first non-volatile memory die, wherein the message is sent before determining whether or not the data was successfully stored in the non-volatile storage of the first non-volatile memory die; retrieving the data from the volatile storage of the first non-volatile memory die in response to determining that storage of the data at the first physical address in the non-volatile memory die has failed; sending a request for a second physical address in response to determining that storage of the data at the first physical address has failed, wherein the request includes the first physical address; receiving a second physical address corresponding to the logical address; and storing the data at the second physical address in one of the plurality of non-volatile memory dice. ### Claim 10 (depends on 9) The non-transitory machine-readable storage medium of claim 9, further comprising: wherein the volatile storage is a cache register. ### Claim 11 (depends on 9) The non-transitory machine-readable storage medium of claim 9, wherein data retrieved from the volatile storage is stored in a buffer of another volatile storage reserved for write failures. ### Claim 12 (depends on 9) The non-transitory machine-readable storage medium of claim 9, wherein one or more blocks of non-volatile storage at the first physical address are retired from use. ### Claim 13 (depends on 9) The non-transitory machine-readable storage medium of claim 9, wherein the first physical address is stored in a controller memory until the data is successfully stored in the non-volatile memory die. ### Claim 14 (depends on 13) The non-transitory machine-readable storage medium of claim 13, wherein a mapping between the first physical address and the data is stored in the controller memory. ### Claim 15 (depends on 14) The non-transitory machine-readable storage medium of claim 14, wherein the request for the second physical address is generated using the mapping between the first physical address and the data. ### Claim 16 (depends on 9) The non-transitory machine-readable storage medium of claim 9, wherein the processing device is further to: map the first physical address to the logical address in an address translation data structure; and update the address translation data structure to replace the first physical address with the second physical address. ### Claim 17 A memory subsystem comprising: a controller memory; a plurality of non-volatile memory dice each including volatile storage and non-volatile storage; and a processing device coupled to the non-volatile memory die, the processing device configured to: receive a first physical address and a data, wherein the first physical address corresponds to a logical address; initiate storage of the data at the first physical address in a first of the plurality of non-volatile memory dice of a memory subsystem by sending the data to the first non-volatile memory die, wherein the first non-volatile memory die temporarily stores the data in the volatile storage of the first non-volatile memory die while writing to the non-volatile storage of the first non-volatile memory die; send a message indicating that the data has been successfully stored in the first non-volatile memory die, wherein the message is sent before determining whether or not the data was successfully stored in the non-volatile storage of the first non-volatile memory die; retrieve the data from the volatile storage of the first non-volatile memory die in response to determining that storage of the data at the first physical address in the non-volatile memory die has failed; send a request for a second physical address in response to determining that storage of the data at the first physical address has failed, wherein the request includes the first physical address; receive a second physical address corresponding to the logical address; and initiate storage of the data at the second physical address in one of the plurality of non-volatile memory dice. ### Claim 18 (depends on 17) The memory subsystem of claim 17, wherein a mapping between the first physical address and the data is stored in the controller memory. ### Claim 19 (depends on 18) The memory subsystem of claim 18, wherein the request for the second physical address is generated using the mapping between the first physical address and the data. ### Claim 20 (depends on 17) The memory subsystem of claim 17, wherein the processing device is further configured to: map the first physical address to the logical address in an address translation data structure; and update the address translation data structure to replace the first physical address with the second physical address.