# US 10,871,968 B2 · Managed multiple die memory QoS > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,871,968 B2 - Document ID: US10871968B2 - Status: Granted - Kind: B2 - Application number: 16/409,062 - Filed: 2019-05-10 - Published: 2019-08-29 - Granted: 2020-12-22 - Earliest claimed: 2017-08-31 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Sebastien Andre Jean - Web page: https://patentgrep.com/patent/US10871968B2 ## CPC - G06F 9/30192: {according to data descriptor, e.g. dynamic data typing} - G06F 9/3004: {to perform operations on memory} - G06F 13/1642: {with request queuing} - G06F 13/1668: {Details of memory controller} - G06F 13/18: based on priority control (G06F13/1605 takes precedence) - G11C 16/04: using variable threshold transistors, e.g. FAMOS - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Devices and techniques for implementing quality-of-service (QoS) parameters in a managed memory device having a number of memory dies are disclosed herein. A memory controller can receive instructions from a host device, determine an initial priority for each instruction using QoS parameters, and allocate the received instructions to the number of memory dies using the initial priority. The memory controller can maintain separate schedules for each of the number or memory dies, update the initial priority for each instruction with the separate schedules, and maintain each of the separate schedules using the updated priority for each instruction in the respective separate schedule. ## Claims ### Claim 1 A managed memory device, comprising: a memory controller; and a memory array comprising multiple memory dies, wherein the memory controller is configured to receive instructions from a host device, to determine a first priority for a received instruction using a quality-of-service (QoS) parameter, and to allocate the received instruction to a first memory die of the multiple memory dies, and wherein the first memory die is configured to receive the first instruction from the memory controller and maintain a schedule of received instructions, including the first instruction, and wherein the first memory die is configured to determine a second priority for the first instruction using the first priority and a time of the first instruction, and to update the schedule using the second priority. ### Claim 2 (depends on 1) The managed memory device of claim 1, wherein the first memory die comprises die logic configured to maintain the schedule for the first memory die, to determine the second priority for the first instruction, and to update the schedule for the first memory die using the second priority. ### Claim 3 (depends on 1) The managed memory device of claim 1, wherein the first memory die is configured to receive multiple instructions from the memory controller, to maintain the schedule of the first memory die, the schedule comprising an order of the multiple instructions, the multiple instructions comprising the first instruction. ### Claim 4 (depends on 1) The managed memory device of claim 1, wherein the memory controller is configured to receive priority information for a respective instruction from the host device, and to determine the first priority using the received priority information and the QoS parameter. ### Claim 5 (depends on 1) The managed memory device of claim 1, wherein the time of the first instruction is a function of a remaining time before time-out of the first instruction. ### Claim 6 (depends on 1) The managed memory device of claim 1, wherein the first memory die is configured to determine the second priority for the first instruction using the first priority and a status of a second instruction related to the first instruction. ### Claim 7 (depends on 1) The managed memory device of claim 1, wherein, to maintain the schedule of received instructions, the first memory die is configured to order the received instructions in the schedule using determined priorities of the received instructions. ### Claim 8 (depends on 1) The managed memory device of claim 1, wherein each instruction maintained in the schedule is interruptible by another instruction having a higher determined priority. ### Claim 9 (depends on 1) The managed memory device of claim 1, wherein the QoS parameter comprises a parameter affecting perceived user-experience, including responsiveness to user activity. ### Claim 10 (depends on 1) The managed memory device of claim 1, wherein the multiple memory dies comprise different memory dies having different priorities, and wherein the memory controller is configured to determine first priorities for the received instructions and to allocate the received instructions to the multiple memory dies according to the determined first priories of the received instructions and to the priorities of the multiple memory dies. ### Claim 11 A method, comprising: receiving, using a memory controller of a managed memory device, an instruction from a host device; determining, using the memory controller, a first priority for a received instruction using a quality-of-service (QoS) parameter; allocating, using the memory controller, the received instruction to a first memory die of multiple memory dies of the managed memory device; receiving, using a first memory die of the multiple memory dies, a first instruction from the memory controller; maintaining, using the first memory die, a schedule of received instructions, including the first instruction; determining, using the first memory die, a second priority for the first instruction using the first priority and a time of the first instruction; and updating, using the first memory die, the schedule using the second priority. ### Claim 12 (depends on 11) The method of claim 11, wherein the first memory die comprises die logic, and wherein maintaining the schedule for the first memory die, determining the second priority for the first instruction, and updating the schedule using the second priority comprises using the die logic of the first memory die. ### Claim 13 (depends on 11) The method of claim 11, comprising: receiving, using the first memory die, multiple instructions from the memory controller, wherein maintaining the schedule of received instructions comprises maintaining an order of the received instructions, and wherein updating the schedule includes updating the order of the instructions in the schedule using the second priority. ### Claim 14 (depends on 11) The method of claim 11, comprising: receiving priority information for a respective instruction from the host device, wherein determining the first priority comprises using the received priority information and the QoS parameter. ### Claim 15 (depends on 11) The method of claim 11, wherein the time of the first instruction is a function of a remaining time before time-out of the first instruction. ### Claim 16 (depends on 11) The method of claim 11, wherein determining the second priority for the first instruction comprises using the first priority and a status of a second instruction related to the first instruction. ### Claim 17 (depends on 11) The method of claim 11, wherein maintaining the schedule of received instructions comprises ordering the received instructions in the schedule. ### Claim 18 (depends on 11) The method of claim 11, wherein each instruction maintained in the schedule is interruptible by another instruction having a higher determined priority. ### Claim 19 (depends on 11) The method of claim 11, wherein the QoS parameter comprises a parameter affecting perceived user-experience, including responsiveness to user activity. ### Claim 20 (depends on 11) The method of claim 11, comprising: determining, using the memory controller, first priorities for the received instructions from the host device, wherein allocating the received instructions comprises allocating the received instructions to the multiple memory dies, the multiple memory dies having different priorities, according to the determined first priories of the received instructions and to the priorities of the multiple memory dies. ### Claim 21 At least one non-transitory device-readable storage medium comprising instructions that, when executed by die logic of a first memory die of a managed memory device comprising a memory controller and multiple memory dies, cause the die logic to perform operations comprising: receiving a first instruction from the memory controller, the first instruction having a first priority; maintaining a schedule of received instructions, including the first instruction; determining a second priority for the first instruction using the first priority and a time of the first instruction; and updating the schedule using the second priority. ### Claim 22 (depends on 21) The at least one non-transitory device-readable storage medium of claim 21, wherein first priority is determined for the first instruction by the memory controller according to a quality-of-service (QoS) parameter. ### Claim 23 (depends on 21) The at least one non-transitory device-readable storage medium of claim 21, wherein the operations comprise: receiving multiple instructions from the memory controller, wherein maintaining the schedule of received instructions comprises maintaining an order of the received instructions, and wherein updating the schedule includes updating the order of the instructions in the schedule using the second priority. ### Claim 24 (depends on 21) The at least one non-transitory device-readable storage medium of claim 21, wherein the time of the first instruction is a function of a remaining time before time-out of the first instruction. ### Claim 25 (depends on 21) The at least one non-transitory device-readable storage medium of claim 21, wherein determining the second priority for the first instruction comprises using the first priority and a status of a second instruction related to the first instruction.