Controller to detect malfunctioning address of memory device
AssigneeRambus Inc.
InventorsAdrian E. Ong, Fan Ho
Life of this patent
Estimating the term…
Abstract
A controller includes an internal memory to store an address and a memory control unit operatively coupled with the internal memory. The memory control unit includes logic to identify a malfunctioning address of primary data storage elements within an external memory device, the external memory device being another semiconductor device separate from the controller, store the malfunctioning address in the internal memory, and transmit, to the external memory device, a command to initiate a repair of the malfunctioning address using redundant data storage elements and an indication of an address associated with the malfunctioning address.
Claims20
A controller comprising:
- an internal memory to store a row address for repair;
- and
- a memory control unit operatively coupled with the internal memory, the memory control unit comprising logic to:
- transmit a first register setting command to initiate a row repair mode in an external memory device;
- transmit an activation command comprising an indication of the row address for repair;
- transmit a precharge command;
- and
- transmit a second register setting command to terminate the row repair mode in the external memory device.
A method comprising:
- transmitting a first register setting command to initiate a row repair mode in an external memory device;
- transmitting an activation command comprising an indication of a row address for repair;
- transmitting a precharge command;
- and
- transmitting a second register setting command to terminate the row repair mode in the external memory device.
A system comprising:
- a non-volatile memory component to store a row address for repair;
- and
- a memory controller operatively coupled with the internal memory, and configured to:
- transmit a first register setting command to initiate a row repair mode in an external memory device;
- transmit an activation command comprising an indication of the row address for repair;
- transmit a precharge command;
- and
- transmit a second register setting command to terminate the row repair mode in the external memory device.
Dependencies are inferred from the claim text.