# US 10,865,499 B2 · Susceptor for holding a semiconductor wafer, method for depositing an epitaxial layer on a front side of a semiconductor wafer, and semiconductor wafer with epitaxial layer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,865,499 B2 - Document ID: US10865499B2 - Status: Granted - Kind: B2 - Application number: 16/099,363 - Filed: 2017-05-31 - Published: 2019-04-11 - Granted: 2020-12-15 - Earliest claimed: 2016-06-09 - Assignees: Siltronic AG - Applicants: Siltronic AG - Inventors: Joerg Haberecht - Web page: https://patentgrep.com/patent/US10865499B2 ## CPC - C30B 25/12: Substrate holders or susceptors - C23C 16/4585: {Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds} - C30B 29/06: Silicon - H10P 14/2926: {Crystal orientations} - H10P 72/7611: {characterised by edge profile or support profile} - C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR - C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04) - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A susceptor for holding a semiconductor wafer during the deposition of an epitaxial layer on a front side of the semiconductor wafer, has a susceptor ring and a susceptor base, and recesses below the susceptor ring in the susceptor base which are arranged in a manner distributed rotationally symmetrically. The radial width of the recesses is greater than the radial width of the susceptor such that the susceptor ring does not completely cover the recesses. ## Claims ### Claim 1 A susceptor for holding a semiconductor wafer during the deposition of an epitaxial layer on a front side of the semiconductor wafer, comprising a susceptor ring having a ledge for placing the semiconductor wafer in an edge region of a rear side of the semiconductor wafer; and a susceptor base, wherein the susceptor ring is positioned about a center of the susceptor base on the susceptor base, wherein the susceptor base contains recesses which are present below the susceptor ring and which are arranged in a manner distributed rotationally symmetrically on the susceptor base and each have a radial width that is greater than a radial width of the susceptor ring. ### Claim 2 (depends on 1) The susceptor of claim 1, wherein the recesses in the susceptor base have the shape of annulus segments. ### Claim 3 (depends on 2) The susceptor of claim 2, wherein the recesses have a center angle that is not less than 60° and not more than 70° or not less than 90° and not more than 110°. ### Claim 4 (depends on 1) The susceptor of claim 1, wherein a cross section of the recesses in a circumferential direction of the susceptor base has a contour that is V shaped. ### Claim 5 (depends on 1) The susceptor of claim 1, wherein a cross section of the recesses in a circumferential direction of the susceptor base has a contour that is U shaped. ### Claim 6 (depends on 1) The susceptor of claim 1, wherein a cross section of the recesses in the circumferential direction of the susceptor base has a contour that is trapezoidal. ### Claim 7 (depends on 1) A method for depositing an epitaxial layer on a front side of a semiconductor wafer, comprising providing the semiconductor wafer; arranging the semiconductor wafer on a ledge of a susceptor ring of a susceptor of claim 1, wherein the susceptor base has a number of recesses corresponding to a number of first of two alternating partial regions of the edge region of the front side of the semiconductor wafer, and a growth rate of the epitaxial layer is lower in the first partial regions than in the second partial regions owing to a crystal orientation of the front side, in such a way that the first partial regions lie above the recesses in the susceptor base; and depositing the epitaxial layer on the front side of the semiconductor wafer. ### Claim 8 (depends on 7) The method of claim 7, further comprising providing a semiconductor wafer having <100> orientation of the front side and arranging the semiconductor wafer above four recesses in the susceptor base. ### Claim 9 (depends on 7) The method of claim 7, further comprising providing a semiconductor wafer having <110> orientation of the front side and arranging the semiconductor wafer above two recesses in the susceptor base. ### Claim 10 (depends on 7) The method of claim 7, wherein the semiconductor wafer is arranged on the ledge in such a way that the ledge is covered by the semiconductor wafer over a length of not less than 0.5 mm and not more than 3 mm. ### Claim 11 A semiconductor wafer with an epitaxial layer, wherein the thickness of the epitaxial layer in first partial regions of the edge region of the semiconductor wafer with epitaxial layer is thinner than in second partial regions of the edge region, and material depositions are present on the rear side of the semiconductor wafer, by means of which the total thickness of the semiconductor wafer with the epitaxial layer in the first partial regions is matched to the total thickness of the semiconductor wafer with the epitaxial layer in the second partial regions. ### Claim 12 (depends on 11) The semiconductor wafer of claim 11, which has a local flatness in the edge region having a maximum ESFQR value of not more than 12 nm for an edge exclusion of 2 mm.