Resistive memory device having a template layer
Assignee4Ds Memory, Limited
InventorSeshubabu Desu
Life of this patent
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Abstract
A memory device including a template layer is disclosed. The memory device also includes a memory layer connected to the template layer, where the memory layer has a variable resistance, and where the crystalline structure of the memory layer matches the crystalline structure of the template layer. The memory device also includes a conductive top electrode on the memory layer, where the top electrode and the memory layer cooperatively form a heterojunction memory structure.
Claims22
A memory device, comprising:
- a template layer;
- and
- a memory layer connected to the template layer, wherein the memory layer has a variable resistance which can vary between first and second resistance values, and wherein the first resistance value is equal to or greater than two times the second resistance value.
A method of manufacturing a memory device, the method comprising:
- forming a template layer;
- and
- connecting a memory layer to the template layer, wherein the memory layer has a variable resistance which can vary between first and second resistance values, and wherein the first resistance value is equal to or greater than two times the second resistance value.
A method of using a memory device, the memory device comprising a template layer, a memory layer connected to the template layer, wherein the memory layer has a variable resistance, the method comprising:
- applying a first voltage difference across the template layer and the memory layer, whereby an electric field is generated in the memory layer, and such that a resistance of the memory layer is changed from a first resistance value to a second resistance value, and wherein the first resistance value is equal to or greater than two times the second resistance value;
- applying a second voltage difference across the template layer and the memory layer;
- while the second voltage difference is applied, causing a first current to be conducted through the template layer and the memory layer;
- and
- determining a resistivity state of the memory layer based on the second voltage difference and the first current.
Dependencies are inferred from the claim text.