Data processor having a memory-management-unit which sets a deterministic-quantity value

A data processor comprising:

• a memory-management-unit, with a MMU-input-terminal and a MMU-output-terminal, wherein the memory-management-unit is configured to:
• receive at the MMU-input-terminal external-operation-data from a CPU, the external-operation-data representative of a request for response-data;
• set a deterministic-quantity value for the external-operation-data based on the external-operation-data,
• wherein the deterministic-quantity value is either an active-value or an inactive-value,
• wherein the active-value of the deterministic-quantity value indicates that the response-data is required on a deterministic basis such that a time delay for providing the response-data needs to be well-known and accurate, and
• wherein the inactive-value of the deterministic-quantity value indicates that the response-data is not required on a deterministic basis such that the time delay for providing the response-data need not be well-known;
• provide a memory-signal, based on the external-operation-data and the deterministic-quantity value, to the MMU-output-terminal;
• and
• a non-deterministic-processor-block comprising:
• a NDP-input-terminal, configured to receive the memory-signal from the MMU-output-terminal;
• a control-block;
• a performance-enhancement-block;
• and
• a NDP-output-terminal,
• wherein the control-block is configured to:
• (i) send the memory-signal to the NDP-output-terminal when the deterministic-quantity value is the active-value, thereby bypassing the performance-enhancement-block even when the time delay for providing the response data is greater bypassing the performance-enhancing-block as compared to not bypassing the performance-enhancement-block;
• or
• (ii) send at least a portion of the memory-signal that is representative of the request for response-data to the performance-enhancement-block when the deterministic-quantity value is the inactive-value, wherein:
• when the performance-enhancement-block comprises the response-data then the performance-enhancement-block is configured to send the response-data to the CPU;
• or
• when the performance-enhancement-block does not comprise the response-data then the performance-enhancement-block is configured to send the memory-signal to the NDP-output-terminal.