Access schemes for section-based data protection in a memory device

An apparatus comprising:

• a section of a memory device comprising:
• a plurality of memory cells;
• a plurality of word lines coupled with the plurality of memory cells;
• and
• a plurality of digit lines coupled with the plurality of memory cells;
• and
• a controller coupled with the section of the memory device and operable to:
• perform an access operation on a target memory cell of the plurality of memory cells, wherein performing the access operation comprises activating a first word line from the plurality of word lines to selectively couple the target memory cell with one of the plurality of digit lines;
• and
• perform an equalization operation on a second memory cell of the plurality of memory cells based at least in part on performing the access operation, wherein performing the equalization operation comprises activating a second word line from the plurality of word lines.

An apparatus comprising:

• a section of a memory device comprising:
• a plurality of memory cells;
• a plurality of word lines coupled with the plurality of memory cells;
• and
• a plurality of digit lines coupled with the plurality of memory cells;
• and
• a controller coupled with the section of the memory device and operable to:
• select a target memory cell from the plurality of memory cells for an access operation;
• perform the access operation on the target memory cell, wherein the access operation comprises selectively coupling the target memory cell with one of the plurality of digit lines;
• and
• perform an equalization operation on a second memory cell of the plurality of memory cells based at least in part on performing the access operation, wherein the equalization operation comprises selectively coupling the second memory cell with the one of the plurality of digit lines.