Field programmable transistor arrays

A mixed programmable and application-specific integrated circuit, comprising:

• standard logic cells that are configured during manufacturing of the mixed programmable and application-specific integrated circuit;
• and
• a field-programmable transistor array that is configurable after manufacturing of the integrated circuit, wherein the field-programmable transistor array comprises:
• a plurality of logic cells, wherein each of the plurality of logic cells
• comprises a plurality of columns of transistors, wherein each of the plurality of columns of transistors comprises a plurality of first transistors and a plurality of second transistors;
• wherein each of the plurality of first transistors are individually programmable to be either always on, always off, or to be controlled by a logic signal;
• wherein a number of the plurality of second transistors are configured to be programmed to be always on or always off or to be controlled by a logic signal;
• wherein the first transistors and the second transistors in the plurality of columns of transistors in a logic cell in the plurality of logic cells are programmable to configure the logic cell to implement the function of a logic gate;
• and
• wherein the logic cell further comprises a logic circuit selected from a group of logic circuits consisting of a D-flip-flop, a full adder, a multiplexer, a three-input NAND gate, and an AND-OR-INVERT gate.