Miller Clamp driver with feedback bias control

A circuit, comprising:

• a voltage supply configured to generate an internal supply signal according to a reference voltage and a feedback signal, the voltage supply comprising:
• a current source comprising a first terminal and a second terminal;
• a first n-type field-effect transistor (FET) comprising:
• a gate terminal coupled to the first terminal of the current source;
• a drain terminal coupled to the second terminal of the current source, and
• a source terminal;
• a second n-type FET comprising:
• a gate terminal coupled to the first terminal of the current source;
• a drain terminal coupled to the first terminal of the current source;
• and
• a source terminal;
• a voltage source comprising:
• a first terminal coupled to the source terminal of the second n-type FET;
• and
• a second terminal coupled to a ground terminal;
• a resistor coupled between the source terminal of the first n-type FET and the ground terminal;
• and
• a capacitor coupled between the source terminal of the first n-type FET and the ground terminal;
• a driver circuit comprising:
• a first input terminal coupled to the source terminal of the first n-type FET;
• and
• an output terminal, wherein the driver circuit is configured to drive the output terminal of the driver circuit with the internal supply signal in accordance with a control signal;
• and
• a feedback bias circuit configured to detect an output current flowing to the output terminal of the driver circuit and generate the feedback signal according to the output current, the feedback bias circuit comprising:
• an input terminal coupled to the output terminal of the driver circuit;
• and
• an output terminal coupled to the first terminal of the current source.

A system, comprising:

• a transistor comprising a gate terminal;
• and
• a driver coupled to the transistor, and the driver configured to drive the transistor, the driver comprising:
• an internal Miller Clamp comprising:
• an input terminal;
• and
• an output terminal coupled to the gate terminal of the transistor through a first resistor;
• a field effect transistor (FET) comprising:
• a drain terminal coupled to the gate terminal of the transistor;
• a source terminal coupled to a ground terminal;
• and
• a gate terminal coupled to the internal Miller Clamp;
• a pull-up circuit coupled to the gate terminal of the transistor through a second resistor, the pull-up circuit comprising an output terminal;
• a comparison circuit comprising:
• an input terminal coupled to the output terminal of the pull-up circuit;
• and
• an output terminal coupled to the input terminal of the internal Miller Clamp;
• and
• an external Miller Clamp comprising:
• an input terminal coupled to the output terminal of the comparison circuit;
• an output terminal coupled to the gate terminal of the FET;
• a voltage supply comprising an input terminal and an output terminal;
• a driver circuit comprising:
• a first input terminal coupled to the output terminal of the voltage supply;
• a second input terminal;
• and
• an output terminal;
• and
• a feedback bias circuit comprising:
• an input terminal coupled to the output terminal of the driver circuit;
• and
• an output terminal coupled to the input terminal of the voltage supply, and wherein the external Miller Clamp does not comprise a low dropout regulator (LDO).