Radio frequency low power differential frequency multiplier

A method of frequency multiplying, comprising:

• receiving a differential input signal having a first frequency at a frequency multiplier circuit comprising:
• a first set of transistors comprising a first transistor and a second transistor, wherein each of the transistors in the first set is a first type of transistor;
• a second set of transistors comprising a third transistor and a fourth transistor, wherein each of the transistors in the second set is a second type of transistor;
• and
• a resonant circuit having a first terminal coupled to the first set of transistors and a second terminal coupled to the second set of transistors, wherein the resonant circuit comprises an inductive element and a capacitive element coupled in parallel with the inductive element;
• supplying a current with a current source coupled to a source of the first transistor and a source of the second transistor;
• and
• generating, with the frequency multiplier circuit, a differential output signal at a second frequency that is an integer multiple of the first frequency.

A method of frequency multiplying, comprising:

• receiving a differential input signal having a first frequency at a frequency multiplier circuit comprising:
• a first set of transistors comprising a first transistor and a second transistor, wherein each of the transistors in the first set is a first type of transistor;
• a second set of transistors comprising a third transistor and a fourth transistor, wherein each of the transistors in the second set is a second type of transistor;
• and
• a resonant circuit having a first terminal coupled to the first set of transistors and a second terminal coupled to the second set of transistors, wherein the resonant circuit comprises an inductive element and a capacitive element coupled in parallel with the inductive element;
• generating, with the frequency multiplier circuit, a differential output signal at a second frequency that is an integer multiple of the first frequency;
• and
• adjusting a bias voltage applied to the second set of transistors with a gate of a fifth transistor coupled to an output of a common-mode feedback amplifier having a first input coupled to the first and second terminals of the resonant circuit and a second input coupled to a reference voltage node, the fifth transistor having a drain coupled to a source of the third transistor and to a source of the fourth transistor and having a source coupled to a reference potential node.