Clock synthesizer with integrated voltage droop detection and clock stretching
AssigneesAdvanced Micro Devices, Inc., ATI Technologies ULC
InventorsDirk J. Robinson, Andy Huei Chu, Yan Sun, Saket Sham Doshi
Life of this patent
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Abstract
A clock synthesizer has integrated voltage droop detection and clock stretching. An oscillator of the clock synthesizer receives a control current from a digital to analog converter and generates an oscillator output signal. A droop detector and clock stretching circuit responds to a voltage droop of a supply voltage supplying circuits coupled to the oscillator output signal, to cause a portion of the oscillator control current to be diverted from the oscillator to thereby cause the oscillator to reduce the first frequency. The diversion can be accomplished through shunt circuits or a current mirror circuit.
Claims20
A method comprising:
- supplying an oscillator control current to cause an oscillator to supply an oscillator output signal with a first frequency;
- responsive to occurrence of a voltage droop of a supply voltage, causing a portion of the oscillator control current to be diverted from the oscillator to cause the oscillator to supply the oscillator output signal with a second frequency lower than the first frequency;
- comparing respective reference voltages from a resistor string to a voltage corresponding to the supply voltage in a plurality of comparators and generating a plurality of compare results;
- and
- selectively turning on shunt circuits based on the compare results to shunt the portion of the oscillator control current to a ground node responsive to the voltage droop.
A method comprising:
- supplying an oscillator control current to cause an oscillator to supply an oscillator output signal with a first frequency;
- responsive to occurrence of a voltage droop of a supply voltage, causing a portion of the oscillator control current to be diverted from the oscillator to cause the oscillator to supply the oscillator output signal with a second frequency lower than the first frequency;
- diverting the portion of the oscillator control current through an output leg of a first current mirror circuit responsive to the voltage droop;
- and
- adjusting a width to length ratio of the output leg of the first current mirror circuit to adjust a gain of the first current mirror circuit responsive to control bits used to generate the oscillator control current.
A clock synthesizer comprising:
- an oscillator responsive to an oscillator control current to generate an oscillator output signal having a first frequency;
- a droop detector and clock stretching circuit responsive to a voltage droop of a supply voltage, to cause a portion of the oscillator control current to be diverted from the oscillator and take another path away from the oscillator to thereby cause the oscillator to generate the oscillator output signal with a second frequency that is lower than the first frequency;
- wherein the droop detector and clock stretching circuit includes:
- a droop detector circuit configured to detect the voltage droop and supply an indication of a detected voltage droop;
- and
- a plurality of shunt circuits coupled to the droop detector circuit to shunt the portion of the oscillator control current responsive to the indication of the detected voltage droop to thereby cause the oscillator to generate the oscillator output signal with the second frequency.
A clock synthesizer comprising:
- an oscillator responsive to an oscillator control current to generate an oscillator output signal having a first frequency;
- a droop detector and clock stretching circuit responsive to a voltage droop of a supply voltage, to cause a portion of the oscillator control current to be diverted from the oscillator and take another path away from the oscillator to thereby cause the oscillator to generate the oscillator output signal with a second frequency lower than the first frequency;
- wherein the droop detector and clock stretching circuit includes a first current mirror circuit having an output leg through which the portion of the oscillator control current flows during the voltage droop;
- and
- wherein control bits supplied to generate the oscillator control current are coupled to adjust a width to length ratio of the output leg of the first current mirror circuit to thereby adjust a gain of the first current mirror circuit to keep the portion of current diverted proportional to the first frequency of the oscillator output signal.
Dependencies are inferred from the claim text.