Method to reduce etch variation using ion implantation

A method of forming a transistor device, comprising:

• forming first and second doped regions within a semiconductor substrate wherein the first doped region is doped with a p-type dopant and the second doped region is doped with a n-type dopant, the first and second doped regions having first and second etch rates, respectively, which are different from one another for a pre-determined etch;
• selectively implanting n-type dopant atoms into the first doped region to alter the first etch rate such that the first etch rate is altered to be substantially equal to the second etch rate;
• and
• etching both the first, selectively implanted doped region and the second doped region using the pre-determined etch to remove a first depth of material from the first, selectively implanted doped region and to remove a second depth of material from the second doped region, the first depth being equal to the second depth.

A method of forming a transistor device, comprising:

• providing a plurality of doped semiconductor regions in a semiconductor substrate, the plurality of doped semiconductor regions including a first p-type region, a second p-type region, and a third n-type region, wherein the second p-type region is of a different dopant concentration than the first p-type region, and wherein the plurality of doped semiconductor regions have different etch rates from one another;
• selectively implanting dopant atoms into the plurality of doped semiconductor regions, wherein the first p-type region is doped with n-type atoms, the second p-type region is doped with n-type atoms, and the third n-type region is doped with p-type atoms to alter a first etch rate of the one or more first doped regions to be equal to a second and a third etch rate of one or more second and third doped regions of the plurality of doped semiconductor regions;
• and
• etching the one or more first doped regions and the one or more second doped regions to form recesses having equal recess depths in the semiconductor substrate.