Integrated circuit with doped low-k sidewall spacers for gate stacks
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
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Abstract
Various examples of an integrated circuit with a sidewall spacer and a technique for forming an integrated circuit with such a spacer are disclosed herein. In some examples, the method includes receiving a workpiece that includes a substrate and a gate stack disposed upon the substrate. A spacer is formed on a side surface of the gate stack that includes a spacer layer with a low-k dielectric material. A source/drain region is formed in the substrate; and a source/drain contact is formed coupled to the source/drain region such that the spacer layer of the spacer is disposed between the source/drain contact and the gate stack.
Claims18
A device comprising:
- a gate stack disposed on a substrate;
- a first sidewall spacer formed of a low-k dielectric material and disposed on the gate stack, wherein the low-k dielectric material is a material having a dielectric constant of 1 to less than 3.9, wherein the low-k dielectric material includes a porous low-k dielectric material and a dopant selected from the group consisting of an n-type dopant and a p-type dopant;
- and
- a second sidewall spacer disposed on the gate stack and extending under the first sidewall spacer such that the first sidewall spacer is prevented from physically contacting the substrate by the second sidewall spacer.
A device comprising:
- a first gate stack disposed on a substrate;
- a first sidewall spacer disposed along an edge of the first gate stack, the first sidewall spacer having an L-shaped profile that defines a recess;
- and
- a second sidewall spacer formed of a low-k dielectric material and disposed on the first sidewall spacer within the recess defined by the L-shaped profile of the first sidewall spacer, wherein the low-k dielectric material is a material having a dielectric constant of 1 to less than 3.9, wherein the low-k dielectric material includes a dielectric material and a dopant selected from the group consisting of an n-type dopant and a p-type dopant,
- wherein the low-k dielectric material has at least one void therein.
A device comprising:
- a substrate;
- a gate stack disposed on the substrate;
- a first sidewall spacer disposed on a side surface of the gate stack, wherein the first sidewall spacer includes a low-k dielectric material, wherein the low-k dielectric material includes a void therein and a dopant;
- a second sidewall spacer disposed between the first sidewall spacer and the substrate such that the second sidewall spacer prevents the low-k dielectric material from interface with the substrate;
- and
- a source/drain contact disposed such that the sidewall spacer is disposed between the source/drain contact and the gate stack.
Dependencies are inferred from the claim text.