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US 10,854,718 B2Granted
Method of forming a semiconductor device
AssigneeSemiconductor Components Industries, LLC
InventorWoochul Jeon
Life of this patent
Estimating the term…
Abstract
In one embodiment, a method of forming a HEM diode may comprise forming the HEM diode with high forward voltage that is greater than one of a gate-to-source threshold voltage of a HEMT or a forward voltage of a P-N diode.
Claims20
A method of forming a semiconductor device including a diode having a high forward voltage comprising:
- providing a semiconductor substrate;
- forming a gallium nitride channel layer overlying a first portion of the semiconductor substrate;
- forming an aluminum gallium nitride carrier supply layer on the gallium nitride channel layer wherein a 2DEG region is formed near an interface between the gallium nitride channel layer and the aluminum gallium nitride carrier supply layer;
- forming a metal cathode on a first portion of the aluminum gallium nitride carrier supply layer;
- forming a first P-type GaN layer on a second portion of the aluminum gallium nitride carrier supply layer wherein the first P-type GaN layer is spaced a first distance from the metal cathode;
- forming an insulator positioned between the first P-type GaN layer and the metal cathode;
- forming a metal anode overlying and electrically connected to the first P-type GaN layer;
- forming a control element as a P-type gallium nitride material on the aluminum gallium nitride carrier supply layer wherein the control element is electrically coupled to the first P-type GaN layer including forming the control element a second distance from the first P-type GaN layer and separated from the metal cathode by a third distance wherein the second distance is less than the first distance and wherein a width of the control element is less than a width of the first P-type GaN layer and wherein the control element inhibits formation of the 2DEG underlying the control element and the first P-type GaN layer inhibits formation of the 2DEG underlying the first P-type GaN layer but the 2DEG is formed underlying the third distance between the first P-type GaN layer and the control element.
5 more elements
A method of forming a semiconductor device comprising:
- forming a HEM diode and a HEMT on a substrate including forming the HEM diode to have a forward voltage that is greater than a gate-to-source threshold voltage of the HEMT and less than a gate-to-source breakdown voltage of the HEMT;
- and
- forming a control element of the HEM diode positioned a distance laterally between an anode of the HEM diode and a cathode of the HEM diode, the control element spaced laterally apart from the anode wherein the control element inhibits forming a 2DEG region underlying the control element and the 2DEG region is formed underlying a region adjacent to the control element wherein the region adjacent to the control element is positioned laterally between the anode and the control element.
A method of forming a semiconductor device comprising:
- providing a substrate;
- forming a HEM diode and a HEMT on the substrate including forming the HEM diode to have a forward voltage that is either greater than a gate-to-source threshold voltage of the HEMT or less than a gate-to-source breakdown voltage of the HEMT;
- forming a first semiconductor layer from a group III or group V semiconductor material wherein the first semiconductor layer forms a 2DEG with an underlying second semiconductor layer;
- forming a cathode electrode on a first portion of the first semiconductor layer;
- forming a third semiconductor layer from another group III or group V semiconductor material as a first semiconductor material, including forming the third semiconductor layer on a second portion of the first semiconductor layer wherein the third semiconductor layer is spaced a first distance from the cathode electrode;
- forming an anode electrode of the diode on the third semiconductor layer;
- forming a control element as a second semiconductor material positioned laterally between the third semiconductor layer and the cathode electrode and electrically connected to the third semiconductor layer wherein a space is positioned between the control element and the third semiconductor layer and wherein the second semiconductor material forms a P-N junction with the first semiconductor layer, the third semiconductor layer inhibits formation of the 2DEG underlying the third semiconductor layer, the control element inhibits formation of the 2DEG underlying the control element, and the 2DEG is formed underlying the space.
4 more elements
Dependencies are inferred from the claim text.