Semiconductor device

A semiconductor device comprising:

• a first transistor which includes a first impurity region of a first conductivity type and a second impurity region of the first conductivity type, the first impurity region and the second impurity region being formed in a first fin which extends in a first direction in a plan view;
• a second transistor which includes a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type, the third impurity region being electrically connected to the second impurity region, and the third impurity region and the fourth impurity region being formed in a second fin which extends in the first direction in a plan view;
• a power supply terminal electrically connected to the first impurity region;
• a ground terminal electrically connected to the fourth impurity region;
• a first guard ring, which includes fifth impurity region of a second conductivity type different from the first impurity type, surrounding the first transistor in a plan view, the fifth impurity region being electrically connected to the ground terminal, and the fifth impurity region being formed in a third fin which extends in the first direction in a plan view;
• and
• a second guard ring, which includes sixth impurity region of the second conductivity type, surrounding the second transistor in a plan view, the sixth impurity region being electrically connected to the ground terminal, and the sixth impurity region being formed in a fourth fin which extends in the first direction in a plan view,
• wherein
• the first guard ring includes a first part which extends in a second direction different from the first direction in a plan view,
• the second guard ring includes a second part which extends in the second direction in a plan view,
• a width of the fourth fin along the first direction in the second part is narrower than a width of the third fin along the first direction in the first part in a plan view,
• the first part and the first transistor are arranged in the first direction in a plan view, and
• the second part and the second transistor are arranged in the first direction in a plan view.