Display device and semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorMizuki Sato
Life of this patent
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Abstract
An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
Claims2
A display device comprising:
- a first transistor;
- a second transistor;
- a first wiring;
- a second wiring;
- an EL element;
- and
- a capacitor,
- wherein the first wiring is electrically connected to one of a source and a drain of the first transistor,
- wherein the EL element is electrically connected to the other of the source and the drain of the first transistor,
- wherein the first wiring extends in a first direction and is configured to transmit a current that flows into the EL element via the first transistor,
- wherein the second wiring extends in the first direction and is electrically connected to one of a source and a drain of the second transistor,
- wherein the second transistor is configured to supply a signal of the second wiring to the first transistor,
- wherein a semiconductor layer of the first transistor has a bent shape in a plane view,
- wherein a channel formation region of the first transistor comprises a region through which carriers flow in a direction intersecting with the first direction,
- wherein the first wiring comprises a region overlapping with the semiconductor layer with a conductive layer interposed therebetween,
- wherein the conductive layer serves as a gate electrode of the first transistor and one electrode of the capacitor, and
- wherein the second wiring comprises a region overlapping with the semiconductor layer.
A display device comprising:
- a first transistor;
- a second transistor;
- a first wiring;
- a second wiring;
- an EL element;
- and
- a capacitor,
- wherein the first wiring is electrically connected to one of a source and a drain of the first transistor,
- wherein the EL element is electrically connected to the other of the source and the drain of the first transistor,
- wherein the first wiring extends in a first direction and is configured to transmit a current that flows into the EL element via the first transistor,
- wherein the second wiring extends in the first direction and is electrically connected to one of a source and a drain of the second transistor,
- wherein the second transistor is configured to supply a signal of the second wiring to the first transistor,
- wherein a semiconductor layer of the first transistor has a bent shape in a plane view,
- wherein a channel formation region of the first transistor comprises a region through which carriers flow in a direction intersecting with the first direction,
- wherein the first wiring comprises a region overlapping with the semiconductor layer with a conductive layer interposed therebetween,
- wherein the conductive layer serves as a gate electrode of the first transistor and one electrode of the capacitor,
- wherein the second wiring comprises a region overlapping with the semiconductor layer,
- wherein the channel formation region of the first transistor comprises crystal silicon, and
- wherein a channel formation region of the second transistor comprises crystal silicon.
Dependencies are inferred from the claim text.