US 10,854,641 B2Granted

Semiconductor device and electronic device

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsHajime Kimura, Atsushi Umezaki, Shunpei Yamazaki

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Abstract

An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less.

Claims12

Dependent claims

A semiconductor device comprising:

a first transistor;
a second transistor;
a third transistor;
a fourth transistor;
a fifth transistor;
and
a sixth transistor,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor each comprise an oxide semiconductor in a channel formation region,
wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,
wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,
wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,
wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the second transistor,
wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor,
wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor,
wherein the other of the source and the drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor,
wherein the other of the source and the drain of the fifth transistor is electrically connected to a third wiring,
wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor,
wherein the other of the source and the drain of the sixth transistor is electrically connected to the third wiring, and
wherein a gate of the sixth transistor is electrically connected to a gate of the third transistor.

16 more elements

A semiconductor device comprising:

a first transistor;
a second transistor;
a third transistor;
a fourth transistor;
a fifth transistor;
a sixth transistor;
a seventh transistor;
and
an eighth transistor,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor each comprise an oxide semiconductor in a channel formation region,
wherein one of a source and a drain of the first transistor is directly connected to a first wiring,
wherein the other of the source and the drain of the first transistor is directly connected to a second wiring,
wherein one of a source and a drain of the second transistor is directly connected to a gate of the first transistor,
wherein the other of the source and the drain of the second transistor is directly connected to a gate of the second transistor,
wherein one of a source and a drain of the third transistor is directly connected to one of a source and a drain of the fourth transistor,
wherein the other of the source and the drain of the third transistor is directly connected to one of a source and a drain of the fourth transistor,
wherein the other of the source and the drain of the fourth transistor is directly connected to one of a source and a drain of the fifth transistor,
wherein the other of the source and the drain of the fifth transistor is directly connected to a third wiring,
wherein one of a source and a drain of the sixth transistor is directly connected to the gate of the first transistor,
wherein the other of the source and the drain of the sixth transistor is directly connected to one of a source and a drain of the seventh transistor,
wherein the other of the source and the drain of the seventh transistor is directly connected to one of a source and a drain of the eighth transistor,
wherein the other of the source and the drain of the eighth transistor is directly connected to the third wiring,
wherein a gate of the sixth transistor is directly connected to a gate of the third transistor,
wherein a gate of the seventh transistor is directly connected to a gate of the fourth transistor, and
wherein a gate of the eighth transistor is directly connected to a gate of the fifth transistor.

22 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/823,785Filed 19 Mar 2020 · continuation
Priority: JP 2009-28226811 Dec 2009
Published: US 2020/0321357 A18 Oct 2020
Granted: 1 Dec 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification31 codes

H10D 86/60
Characterised by multiple TFTs: wherein the TFTs are in active matrices
G02F 1/133345
Constructional arrangements; Manufacturing methods: insulating layers
G02F 1/1334
Constructional arrangements; Manufacturing methods: based on polymer dispersed liquid crystals, e.g. microencapsulated liquid crystals
G02F 1/134309
Electrodes: characterised by their geometrical arrangement

Family

Application12/960,659Parent of this continuation · filed 6 Dec 2010
Application13/763,804Parent of this continuation · filed 11 Feb 2013
US 8,415,665 B2Parent of this continuation · filed 9 Apr 2013
Application14/508,083Parent of this continuation · filed 7 Oct 2014
US 8,890,146 B2Parent of this continuation · filed 18 Nov 2014
Application14/887,517Parent of this continuation · filed 20 Oct 2015
US 9,171,868 B2Parent of this continuation · filed 27 Oct 2015
Application15/159,131Parent of this continuation · filed 19 May 2016
US 9,349,757 B2Parent of this continuation · filed 24 May 2016
Application15/665,701Parent of this continuation · filed 1 Aug 2017
US 9,735,180 B2Parent of this continuation · filed 15 Aug 2017
Application16/004,882Parent of this continuation · filed 11 Jun 2018
US 10,002,888 B2Parent of this continuation · filed 19 Jun 2018
Application16/426,461Parent of this continuation · filed 30 May 2019
US 10,312,267 B2Parent of this continuation · filed 4 Jun 2019
US 2020/0321357 A1Pre-grant publication · published 8 Oct 2020
US 10,600,818 B2Parent of this continuation
US 2011/0140108 A1Published application
US 2013/0146882 A1Published application
US 2015/0021601 A1Published application
US 2016/0043106 A1Published application
US 2016/0260739 A1Published application
US 2018/0040634 A1Published application
US 2018/0358384 A1Published application
US 2019/0348441 A1Published application
US 10,854,641 B2This patent

From the US filing history. Foreign family members aren’t listed.