Semiconductor memory device and method of manufacturing the same
AssigneeToshiba Memory Corporation
InventorTakeo Mori
Life of this patent
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Abstract
According to an embodiment, a semiconductor memory device comprises: a stacked body that includes a plurality of control gate electrodes stacked above a substrate; a memory columnar body that extends in a first direction above the substrate and configures a memory string along with the stacked body; and a source contact that extends in the first direction and is electrically connected to one end of the memory string. Moreover, this source contact is adjacent to the stacked body via a spacer insulating layer. Furthermore, a spacer protective layer including a nitride or a metal oxide is provided between these source contact and spacer insulating layer.
Claims25
A semiconductor memory device comprising:
- a plurality of control gate electrodes stacked in a first direction crossing a substrate;
- a first semiconductor layer extending in the first direction;
- a charge accumulation layer disposed between the control gate electrode and the first semiconductor layer;
- a contact extending in the first direction along the plurality of control gate electrodes;
- a first spacer insulating layer disposed between the plurality of control gate electrodes and the contact and including a first material;
- and
- a second spacer insulating layer disposed between the contact and the first spacer insulating layer and including a second material different from the first material,
- the contact including:
- a first portion having a first width in a second direction perpendicular to the first direction;
- a second portion having a second width in the second direction;
- and
- an uppermost portion having a third width in the second direction,
- the first portion being between the uppermost portion and the second portion,
- the third width being larger than the first width,
- the first width being the same as the second width.
A semiconductor memory device comprising:
- a substrate;
- a plurality of control gate electrodes stacked in a first direction crossing the substrate;
- a first semiconductor layer extending in the first direction;
- a charge accumulation layer disposed between the control gate electrode and the first semiconductor layer;
- a contact extending in the first direction along the plurality of control gate electrodes;
- a first spacer insulating layer disposed between the plurality of control gate electrodes and the contact and including a first material;
- and
- a second spacer insulating layer disposed between the contact and the first spacer insulating layer and including a second material different from the first material,
- the second spacer insulating layer including:
- a first portion disposed between the contact and the plurality of control gate electrodes;
- and
- a second portion further from the substrate than the plurality of control gate electrodes, the second portion including an end in the first direction of the second spacer insulating layer, and
- a width of the second portion in a second direction perpendicular to the first direction decreasing towards the end in the first direction of the second spacer insulating layer.
Dependencies are inferred from the claim text.