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US 10,854,622 B2Granted
Vertical memory devices and methods of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoung-Bae Yoon, Joong-Shik Shin, Kwang-Ho Kim, Hyun-Mog Park
Life of this patent
Estimating the term…
Abstract
A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
Claims20
A vertical memory device, comprising:
- a channel on a substrate, the substrate including a cell region, an extension region and a dummy region, and the channel extending on the cell region of the substrate in a first direction substantially perpendicular to an upper surface of the substrate;
- gate line stack structures spaced apart from each other on the cell region, the extension region and the dummy region of the substrate, each of the gate line stack structures including gate lines spaced apart from each other in the first direction on the substrate, each of the gate lines surrounding the channel and extending in a second direction substantially parallel to the upper surface of the substrate, and the gate line stack structures being spaced apart from each other in a third direction substantially parallel to the upper surface of the substrate and crossing the second direction;
- a cutting pattern including:
- first cutting portions spaced apart from each other on the cell region and the extension region of the substrate in the third direction, each of the first cutting portions extending in the second direction and cutting the gate lines;
- and
- a second cutting portion extending in the third direction on the substrate, the second cutting portion crossing the first cutting portions and being merged with respective end portions in the second direction of the first cutting portions;
- sub-cutting patterns between the first cutting portions of the cutting pattern on the substrate, each of the sub-cutting patterns extending in the second direction and cutting at least one of the gate lines;
- and
- a dummy cutting pattern extending in the third direction on the dummy region of the substrate, the dummy cutting pattern being spaced apart from portions of the gate line stack structures on the extension region of the substrate and the second cutting portion of the cutting pattern in the second direction,
- wherein each of the sub-cutting patterns and each of the first cutting portions are alternately disposed in the third direction.
7 more elements
A vertical memory device, comprising:
- a channel on a substrate, the substrate including a cell region, an extension region and a dummy region, and the channel extending on the cell region of the substrate in a first direction substantially perpendicular to an upper surface of the substrate;
- gate line stack structures spaced apart from each other on the cell region, the extension region and the dummy region of the substrate, each of the gate line stack structures including gate lines spaced apart from each other in the first direction and stacked in a staircase shape on the substrate, each of the gate lines surrounding the channel, extending in a second direction substantially parallel to the upper surface of the substrate, and having a contact pad protruding in the second direction from overlying ones of the gate lines, and the gate line stack structures being spaced apart from each other in a third direction substantially parallel to the upper surface of the substrate and crossing the second direction;
- a cutting pattern including:
- first cutting portions spaced apart from each other on the cell region and the extension region of the substrate in the third direction, each of the first cutting portions extending in the second direction and cutting the gate lines;
- and
- a second cutting portion extending in the third direction on the substrate, the second cutting portion crossing the first cutting portions and being merged with respective end portions in the second direction of the first cutting portions;
- and
- sub-cutting patterns between the first cutting portions of the cutting pattern on the substrate, each of the sub-cutting patterns extending in the second direction and cutting at least one of the gate lines, wherein:
- each of the sub-cutting patterns is spaced apart from the second cutting portion of the cutting pattern,
- a width in the third direction of the contact pad of a lowermost one of the gate lines of each of the gate line stack structures is substantially equal to a distance between ones of the first cutting portions of the cutting pattern neighboring in the third direction, and
- each of the sub-cutting patterns and each of the first cutting portions are alternately disposed in the third direction.
8 more elements
A vertical memory device, comprising:
- a channel on a substrate, the substrate including a cell region, an extension region and a dummy region, and the channel extending on the cell region of the substrate in a first direction substantially perpendicular to an upper surface of the substrate;
- gate line stack structures spaced apart from each other on the cell region, the extension region and the dummy region of the substrate, each of the gate line stack structures including gate lines spaced apart from each other in the first direction and stacked in a staircase shape on the substrate, each of the gate lines surrounding the channel, extending in a second direction substantially parallel to the upper surface of the substrate, and having a contact pad protruding in the second direction from overlying ones of the gate lines, and the gate line stack structures being spaced apart from each other in a third direction substantially parallel to the upper surface of the substrate and crossing the second direction;
- a cutting pattern including a metal, the cutting pattern including:
- first cutting portions spaced apart from each other on the cell region and the extension region of the substrate in the third direction, each of the first cutting portions extending in the second direction and cutting the gate lines;
- and
- a second cutting portion extending in the third direction on the substrate, the second cutting portion crossing the first cutting portions and being merged with respective end portions in the second direction of the first cutting portions;
- sub-cutting patterns between the first cutting portions of the cutting pattern on the substrate, each of the sub-cutting patterns extending in the second direction and cutting at least one of the gate lines;
- and
- a dummy cutting pattern extending in the third direction on the dummy region of the substrate, the dummy cutting pattern being spaced apart from portions of the gate line stack structures on the extension region of the substrate and the second cutting portion of the cutting pattern in the second direction, wherein:
- each of the sub-cutting patterns is spaced apart from the second cutting portion of the cutting pattern,
- a width in the third direction of the contact pad of a lowermost one of the gate lines of each of the gate line stack structures is substantially equal to a distance between ones of the first cutting portions of the cutting pattern neighboring in the third direction, and
- each of the sub-cutting patterns and each of the first cutting portions are alternately disposed in the third direction.
9 more elements
Dependencies are inferred from the claim text.