Integrated circuit device

An integrated circuit device comprising:

• a substrate comprising a first device region and a second device region;
• a first fin separation insulating portion in the first device region;
• a pair of first fin-type active regions spaced apart from each other in the first device region with the first fin separation insulating portion therebetween, the pair of first fin-type active regions extending in a first horizontal direction;
• a plurality of dummy gate structures extending parallel to each other in a second horizontal direction over the first fin separation insulating portion, the second horizontal direction crossing the first horizontal direction;
• a plurality of second fin separation insulating portions spaced apart from the first fin separation insulating portion and arranged over the second device region;
• and
• a plurality of second fin-type active regions spaced apart from each other in the second device region with the plurality of second fin separation insulating portions therebetween.

An integrated circuit device comprising:

• a substrate comprising a first device region and a second device region spaced apart from each other;
• a device isolation region between the first device region and the second device region;
• a first fin separation insulating portion over the first device region;
• a plurality of pairs of first fin-type active regions in the first device region, each of the plurality of pairs of first fin-type active regions including a first member and a second member, the first member spaced apart from the second member with the first fin separation insulating portion therebetween in a first horizontal direction;
• a plurality of second fin separation insulating portions extending in a second horizontal direction over the second device region and spaced apart from each other, the second horizontal direction crossing the first horizontal direction;
• a plurality of second fin-type active regions in the second device region, the plurality of second fin-type active regions arranged in a straight line extending in the first horizontal direction across the plurality of second fin separation insulating portions;
• and
• a plurality of dummy gate structures over the first fin separation insulating portion extending parallel to each other in the second horizontal direction,
• wherein each of the plurality of second fin separation insulating portions contacts one dummy gate structure selected from the plurality of dummy gate structures.