Semiconductor device and method

A method of forming a semiconductor device comprising:

• forming a fin over a semiconductor substrate;
• forming a metal gate structure extending over the fin, wherein the metal gate structure is surrounded by a first dielectric material;
• forming a patterned hard mask layer over the metal gate structure and the first dielectric material, wherein an opening of the patterned hard mask layer extends from a first region directly over the metal gate structure to a second region directly over the first dielectric material;
• etching a portion of the metal gate structure in the first region and a portion of the first dielectric material in the second region using the same etching process, wherein the etching process forms a recess in the metal gate structure and the first dielectric material, wherein the recess has a first depth in the first region that is greater than a second depth of the recess in the second region, wherein etching the portion of the metal gate structure in the first region exposes the semiconductor substrate;
• and
• filling the recess with an insulating material.

A device comprising:

• a semiconductor substrate;
• a first fin over the semiconductor substrate;
• a second fin over the semiconductor substrate, wherein the second fin is adjacent the first fin;
• an interlayer dielectric (ILD) surrounding the first fin and the second fin comprising a first dielectric material;
• a first gate structure extending over the first fin, wherein the first gate structure comprises a first gate dielectric material and a first gate fill material;
• a second gate structure extending over the second fin, wherein the second gate structure comprises a second gate dielectric material and a second gate fill material;
• and
• an isolation region between the first gate structure and the second gate structure, wherein the isolation region extends into the semiconductor substrate, wherein the first gate dielectric material and the first gate fill material physically contact a first sidewall of the isolation region, wherein the second gate dielectric material and the second gate fill material physically contact a second sidewall of the isolation region that is opposite the first sidewall, wherein the isolation region extends into the ILD, and wherein the isolation region comprises a second dielectric material.