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US 10,854,576 B2Granted
Semiconductor device and manufacturing method thereof
AssigneeToshiba Memory Corporation
InventorsYuji Karakane, Masatoshi Fukuda, Soichi Homma, Masayuki Miura, Naoyuki Komuta, Yuka Akahane, Yukifumi Oyama
Life of this patent
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Abstract
A semiconductor device includes a wiring substrate having a first surface, a stacked body on the first surface, the stacked body comprising a first chip, a second chip having a through via and positioned between the first chip and the first surface, and a third chip, a first resin contacting the first surface and the third chip, and a second resin sealing the stacked body. The first and second resins are made of different materials.
Claims13
A semiconductor device, comprising:
- a wiring substrate comprising a first surface;
- a stacked body on the first surface, the stacked body comprising a first chip, a second chip between the first chip and the first surface, and a third chip between the second chip and the first surface;
- a first resin contacting the first surface and the third chip;
- a second resin sealing the stacked body;
- and
- a third resin located between the wiring substrate and the second chip and directly contacting the first surface and the second chip, wherein
- the second chip has a through via extending therethrough,
- a portion of the second resin is between the wiring substrate and the second chip,
- the second resin is in contact with the first surface and the second chip,
- the first and second resins are different materials, and
- the second and third resins are different materials.
8 more elements
A semiconductor device, comprising:
- a wiring substrate comprising a first surface;
- a stacked body on the first surface, the stacked body comprising a first chip, a second chip between the first chip and the first surface, and a third chip between the second chip and the first surface;
- a first resin contacting the first surface and the third chip;
- a second resin sealing the stacked body;
- a third resin located between the wiring substrate and the second chip and directly contacting the first surface and the second chip;
- a first solder bump connecting the first surface of the wiring substrate and the second chip;
- and
- a second solder bump connecting the first surface of the wiring substrate and the second chip, wherein
- the second chip has a through via extending therethrough,
- a portion of the second resin is between the wiring substrate and the second chip,
- the second resin is in contact with the first surface and the second chip,
- the first and second resins are different materials,
- the second and third resins are different materials,
- the third chip is between the first and second solder bumps, and
- the second resin is between third chip and the first and second solder bumps.
12 more elements
Dependencies are inferred from the claim text.