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US 10,854,534 B2Granted
Semiconductor device and method for manufacturing same
AssigneeToshiba Memory Corporation
InventorsYasuhito Yoshimizu, Yoshiro Shimojo, Shinya Arai
Life of this patent
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Abstract
According to one embodiment, a stacked body includes a plurality of electrode layers stacked with an insulator interposed. A conductive via pierces the stacked body, and connects an upper layer interconnect and a lower layer interconnect. A insulating film is provided between the via and the stacked body. A distance along a diametral direction of the via between a side surface of the via and an end surface of one of the electrode layers opposing the side surface of the via is greater than a distance along the diametral direction between the side surface of the via and an end surface of the insulator opposing the side surface of the via.
Claims15
A semiconductor device, comprising:
- a lower interconnect layer including a first lower interconnect and a second lower interconnect;
- an upper interconnect layer including a first upper interconnect and a second upper interconnect;
- a stacked body provided between the lower interconnect layer and the upper interconnect layer, the stacked body including first and second electrode layers stacked with an insulator interposed in a first direction;
- a source layer provided between the lower interconnect layer and the stacked body;
- a conductive layer provided between the source layer and the stacked body, the conductive layer being thicker than a thickness of one of the first and second electrode layers in the first direction;
- a first conductive via piercing the stacked body, the source layer and the conductive layer, and connecting the first upper interconnect and the first lower interconnect;
- and
- a second conductive via piercing the stacked body, the source layer and the conductive layer, and connecting the second upper interconnect and the second lower interconnect, the second conductive via being arranged next to the first conductive via in a second direction crossing the first direction, where a part of the stacked body interposed between the first conductive via and the second conductive via in the second direction.
5 more elements
A semiconductor device, comprising:
- a lower interconnect layer including a first lower interconnect and a second lower interconnect;
- an upper interconnect layer including a first upper interconnect and a second upper interconnect;
- a stacked body provided between the lower interconnect layer and the upper interconnect layer, the stacked body including first and second electrode layers stacked with an insulator interposed in a first direction;
- a source layer provided between the lower interconnect layer and the stacked body;
- a source-side selection gate provided between the source layer and the stacked body, the source-side selection gate being thicker than a thickness of one of the first and second electrode layers in the first direction;
- a first conductive via piercing the stacked body, the source layer and the source-side selection gate, and connecting the first upper interconnect and the first lower interconnect;
- and
- a second conductive via piercing the stacked body, the source layer and the source-side selection gate, and connecting the second upper interconnect and the second lower interconnect, the second conductive via being arranged next to the first conductive via in a second direction crossing the first direction, where a part of the stacked body interposed between the first conductive via and the second conductive via in the second direction.
5 more elements
A semiconductor device, comprising:
- a lower interconnect layer including a first lower interconnect and a second lower interconnect;
- an upper interconnect layer including a first upper interconnect and a second upper interconnect;
- a stacked body provided between the lower interconnect layer and the upper interconnect layer, the stacked body including first and second electrode layers stacked with an insulator interposed in a first direction;
- a source layer provided between the lower interconnect layer and the stacked body;
- a conductive layer provided between the source layer and the stacked body, the conductive layer being thicker than a thickness of one of the first and second electrode layers in the first direction;
- first and second conductive vias piercing the stacked body, the source layer and the conductive layer, and connecting the upper interconnect layer and the lower interconnect layer, wherein one of the first and the second electrode layers surrounds each of the first and the second conductive vias;
- and
- wherein the first and the second conductive vias directly connect the upper interconnect layer and the lower interconnect layer.
5 more elements
Dependencies are inferred from the claim text.