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US 10,854,506 B2Granted
Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Sheng Liang, Wei-Chih Kao, Hsin-Che Chiang, Kuo-Hua Pan
Life of this patent
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Abstract
A semiconductor device includes a substrate, a gate stack over the substrate, an insulating structure over the gate stack, a conductive via in the insulating structure, and an contact etch stop layer (CESL) over the insulating structure. The insulating structure has an air slit therein. The conductive via is electrically connected to the gate stack. A portion of the CESL is exposed in the air slit.
Claims20
A semiconductor device, comprising:
- a substrate;
- a gate stack over the substrate;
- a gate spacer on a sidewall of the gate stack, wherein the gate spacer has a top surface and an inner sidewall with a first portion and a second portion, the first portion in contact with the gate stack;
- a conductive via over the gate stack;
- and
- an insulating structure around the conductive via and having a first insulating portion, a second insulating portion, and an air slit extending in the insulating structure, the conductive via being exposed to a first end of the air slit and a second end of the air slit separated from the conductive via at least in part by the first insulating portion, and the second insulating portion extending from the top surface of the gate spacer to laterally cover the second portion of the inner sidewall of the gate spacer.
3 more elements
A semiconductor device, comprising:
- a substrate;
- a gate stack over the substrate;
- a plurality of gate spacers on opposite sidewalls of the gate stack, wherein each of the gate spacers has a top surface and an inner sidewall with a first portion and a second portion, the first portion in contact with the gate stack;
- a conductive via over the gate stack;
- and
- an insulating structure around the conductive via and having a first insulating portion, a second insulating portion, and an air slit, wherein the air slit comprises a horizontal portion and a vertical portion connected to the horizontal portion, and the vertical portion is higher than the horizontal portion, and wherein the conductive via is exposed to the horizontal portion of the air slit, the vertical portion of the air slit is separated from the conductive via at least in part by the first insulating portion, and the second insulating portion extends from the top surfaces of the gate spacers to laterally cover the second portion of the inner sidewalls of the gate spacers.
3 more elements
A semiconductor device, comprising:
- a substrate;
- a gate stack over the substrate;
- a gate spacer on a sidewall of the gate stack, wherein the gate spacer has a top surface and an inner sidewall with a first portion and a second portion, the first portion in contact with the gate stack;
- a conductive layer over the gate stack;
- an insulating structure over and in contact with the conductive layer, wherein the insulating structure has a first insulating portion, a second insulating portion, and an air slit therein;
- a conductive via extending through the insulating structure and in contact with the conductive layer, the conductive via being exposed to a first end of the air slit and a second end of the air slit separated from the conductive via at least in part by the first insulating portion, and the second insulating portion extending from the top surface of the gate spacer to laterally cover the second portion of the inner sidewall of the gate spacer;
- and
- a contact etch stop layer (CESL) over the insulating structure and surrounding the conductive via.
5 more elements
Dependencies are inferred from the claim text.