Integrated circuit, system for and method of forming an integrated circuit

An integrated circuit designing system, comprising:

• a non-transitory storage medium encoded with a set of instructions;
• a hardware processor communicatively coupled with the non-transitory storage medium and configured to execute the set of instructions, the set of instructions being configured to cause the hardware processor to:
• place a first set of conductive structure layout patterns on a first layout level, the first set of conductive structure layout patterns corresponding to fabricating a set of rails of an integrated circuit structure, the first set of conductive structure layout patterns extending in a first direction, each conductive structure layout pattern of the first set of conductive structure layout patterns being separated from one another in a second direction;
• place a second set of conductive structure layout patterns on a second layout level different than the first layout level, the second layout level being above the first layout level, the second set of conductive structure layout patterns corresponding to fabricating a first set of conductive structures of the integrated circuit structure, the second set of conductive structure layout patterns extending in the second direction and overlapping the first set of conductive structure layout patterns;
• place a cut feature layout pattern on the second layout level, the cut feature layout pattern corresponding to a cut region of the first set of conductive structures, the cut feature layout pattern extending in the first direction and overlapping at least a first layout pattern of the second set of conductive structure layout patterns;
• place a first set of via layout patterns between the first layout level and the second layout level, the first set of via layout patterns corresponding to fabricating a first set of vias of the integrated circuit structure, each via layout pattern of the first set of via layout patterns being located where each conductive structure layout pattern of the second set of conductive structure layout patterns overlaps each conductive structure layout pattern of the first set of conductive structure layout patterns, the first set of vias couple the first set of conductive structures to the set of rails;
• and
• place a third set of conductive structure layout patterns on a third layout level, the third set of conductive structure layout patterns corresponding to fabricating a second set of conductive structures of the integrated circuit structure, the third set of conductive structure layout patterns extending in the first direction and covering a portion of the first set of conductive structure layout patterns, the third layout level being different than the first layout level and the second layout level, each conductive structure layout pattern of the third set of conductive structure layout patterns being separated from one another in the second direction.

A method of forming an integrated circuit structure, the method comprising:

• generating a first set of conductive structure layout patterns, the first set of conductive structure layout patterns extending in a first direction, each conductive structure layout pattern of the first set of conductive structure layout patterns being separated from one another in a second direction different from the first direction;
• manufacturing a set of rails based on the first set of conductive structure layout patterns, the set of rails extending in the first direction and being located at a first level, each rail of the set of rails being separated from one another in the second direction;
• generating a second set of conductive structure layout patterns, the second set of conductive structure layout patterns extending in the second direction and overlapping the first set of conductive structure layout patterns;
• manufacturing a first set of conductive structures based on the second set of conductive structure layout patterns, the first set of conductive structures extending in the second direction, overlapping the set of rails and being located at a second level different than the first level, the first set of conductive structures comprising a first sub-set of conductive structures and a second sub-set of conductive structures, at least one conductive structure of the first sub-set of conductive structures being aligned with at least one conductive structure of the second sub-set of conductive structures in the second direction,
• manufacturing a first set of vias based on a first set of via layout patterns, the first set of vias being between the set of rails and the first set of conductive structures, each via of the first set of vias being located where each conductive structure of the first set of conductive structures overlaps each rail of the set of rails, and the first set of vias coupling the set of rails to the first set of conductive structures;
• and
• generating a third set of conductive structure layout patterns, the third set of conductive structure layout patterns extending in the first direction, and covering a portion of the first set of conductive structure layout patterns, each conductive structure layout pattern of the third set of conductive structure layout patterns being separated from one another in the second direction,
• wherein at least one of the generating operations is executed by a processor of a computer.