Gate structure passivating species drive-in method and structure formed thereby

A method comprising:

• conformally forming a high-k gate dielectric layer between gate spacers that are over a fin on a substrate, the high-k gate dielectric layer being conformally formed along sidewalls and a top surface of the fin and along respective sidewalls of the gate spacers;
• after the conformally forming the high-k gate dielectric layer, forming a barrier layer over the high-k gate dielectric layer;
• after the forming the barrier layer, conformally depositing a dummy layer over the barrier layer, wherein conformally depositing the dummy layer includes an atomic layer deposition process that cycles multiple times between a first fluorine precursor and a second non-fluorine precursor, the dummy layer comprising fluorine;
• after the conformally depositing the dummy layer, forming a dummy capping layer over the dummy layer;
• after the forming the dummy capping layer, driving the fluorine from the dummy layer into the high-k gate dielectric layer and also driving the fluorine from the dummy layer into the dummy capping layer, wherein the driving the fluorine from the dummy layer into the high-k gate dielectric layer also reduces a concentration of fluorine in the barrier layer;
• after the driving the fluorine from the dummy layer into the high-k gate dielectric layer, removing the dummy layer;
• and
• after the removing the dummy layer, forming a metal gate electrode over the high-k gate dielectric layer after the dummy layer is removed.

A method comprising:

• forming a gate dielectric layer over a substrate;
• after the forming the gate dielectric layer, depositing a first capping layer over the gate dielectric layer;
• after the depositing the first capping layer, depositing a dummy fluorine-containing layer with an atomic layer deposition process over the first capping layer, wherein the dummy fluorine-containing layer comprises a first material and fluorine, wherein the fluorine is deposited with the first material, and wherein forming the dummy fluorine-containing layer is performed at a temperature sufficient to diffuse fluorine into the gate dielectric layer;
• after the depositing the dummy fluorine-containing layer, depositing a dummy capping layer over the dummy fluorine-containing layer, wherein forming the dummy capping layer is performed at a temperature sufficient to diffuse fluorine from the dummy fluorine-containing layer into the gate dielectric layer;
• after the depositing the dummy capping layer, performing an anneal after the depositing the dummy capping layer, the performing the anneal reducing a concentration of fluorine in a portion of the first capping layer, the anneal further diffusing fluorine from the dummy fluorine-containing layer into the dummy capping layer;
• after the performing the anneal, removing the dummy capping layer;
• after the removing the dummy capping layer, removing the dummy fluorine-containing layer;
• and
• after removing the dummy fluorine-containing layer, forming a metal gate electrode over the gate dielectric layer.