Methods for fabricating transistor and ESD device

A method for fabricating a transistor, comprising:

• providing a base substrate;
• forming a first well area in the base substrate, wherein the first well area is doped with a first well ion;
• forming a second well area in the base substrate, wherein:
• the second well area is formed on a side of the first well area, abutting directly against the first well area and doped with a second well ion, and
• the second well area includes a first region adjacent to the first well area and doped with the second well ion, the first region abutting directly against the first well area;
• forming a first ion doping region in the first well area and the first region, wherein the first ion doping region is doped with first ions, and a type of the first ions is the same as a type of the first well ion and opposite to a type of the second well ion;
• and
• forming a gate structure on a part of the first well area and at least a part of the first region, wherein:
• the second well area further includes a second region, wherein the second region is adjacent to the first region, and the second region and the first well area are formed at both sides of the first region:
• the base substrate includes a fin structure, the fin structure including a first fin and a second fin,
• the first region is formed in the first fin,
• the first ion doping region is formed in the first fin and covers a top of the first fin, and
• the second region includes:
• a first portion adjacent between the first fin and the second fin, the first portion being adjacent to the first region, and
• a second portion in the second fin, the second portion being adjacent to the first portion.