Memory system and operating method thereof
AssigneeSK hynix Inc.
InventorsSe Kyoung Hur, Kwang Seok Im
Life of this patent
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Abstract
A memory system and an operating method thereof are provided. The memory system includes a storage device including a mode register suitable for activating or inactivating an auto mode and a memory suitable for storing data, and a storage device controller controlling the mode register to enter a test mode, after inactivating the auto mode, during a test operation of the storage device, and controlling the mode register to activate the auto mode again when the test operation of the storage device is completed.
Claims19
A memory system, comprising:
- a storage device including:
- a mode register suitable for storing one or more pieces of code for activating or inactivating an auto mode of a refresh operation of the storage device and a test mode;
- a memory suitable for storing data;
- and
- a storage device controller suitable for controlling the storage device to:
- inactivate the auto mode;
- enter the test mode when the auto mode is inactivated;
- activate the auto mode when the storage device enters the test mode;
- perform a test operation on the memory during the test mode;
- inactivate the auto mode when the test operation is completed;
- exit the test mode;
- and
- activate the auto mode.
A method of performing an operation of a memory system including a storage device for storing data, the method comprising:
- inactivating a refresh mode and a precharge mode;
- controlling the storage device to enter a test mode when the refresh mode and the precharge mode are inactivated;
- activating the refresh mode and the precharge mode when the storage device enters the test mode;
- controlling the storage device to perform a test operation;
- inactivating the refresh mode and the precharge mode when the test operation is completed;
- controlling the storage device to exit the test mode;
- and
- activating the refresh mode and the precharge mode.
A test method of a DRAM device, the test method comprising:
- controlling the DRAM device to enter a test mode;
- controlling the DRAM device to perform a test operation thereto during the test mode;
- and
- controlling the DRAM device to exit the test mode,
- wherein the DRAM device temporarily inactivates refresh and precharge operations at the entry into and the exit from the test mode.
Dependencies are inferred from the claim text.