Accessing memory cells in parallel in a cross-point array
AssigneeMicron Technology, Inc.
InventorHernan A. Castro
Life of this patent
Estimating the term…
Abstract
Methods and structures for accessing memory cells in parallel in a cross-point array include accessing in parallel a first memory cell disposed between a first selected column and a first selected row and a second memory cell disposed between a second selected column different from the first selected column and a second selected row different from the first selected row. Accessing in parallel includes simultaneously applying access biases between the first selected column and the first selected row and between the second selected column and the second selected row. The accessing in parallel is conducted while the cells are in a thresholded condition or while the cells are in a post-threshold recovery period.
Claims10
A method, comprising:
- accessing a first memory cell coupled with a first selected column and a first selected row based at least in part on applying a first access pulse;
- accessing, in parallel with accessing the first memory cell, a second memory cell coupled with a second selected column and a second selected row based at least in part on applying a second access pulse;
- applying a first hold voltage to the first memory cell during a first hold duration;
- releasing the first memory cell from a hold condition based at least in part on removing the first hold voltage;
- and
- refreshing the first memory cell by applying a refresh pulse to the first memory cell after releasing the first memory cell from the hold condition, wherein accessing the first memory cell comprises applying the first access pulse after applying the refresh pulse.
Dependencies are inferred from the claim text.