Apparatuses and methods including two transistor-one capacitor memory and for accessing same
AssigneeMicron Technology, Inc.
InventorsChristopher J. Kawamura, Scott J. Derner
Life of this patent
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Abstract
Apparatuses and methods are disclosed that include two transistor-one capacitor memory and for accessing such memory. An example apparatus includes a capacitor coupled to first and second selection components. The apparatus further includes a first digit line and the first selection component configured to couple a first plate of the capacitor to the first digit line, and also includes a second digit line and the second selection component configured to couple the second plate to the second digit line. A sense amplifier is coupled to the second digit line and is configured to amplify a voltage difference between a voltage coupled to the second digit line and the reference voltage.
Claims20
An apparatus, comprising:
- a capacitor having a first plate and a second plate;
- a first digit line supplied operatively with a reference voltage from a first driver;
- a first selection component configured to couple the first plate to the first digit line responsive to activating the first selection component;
- a second digit line;
- a second selection component configured to couple the second plate to the second digit line responsive to activating the second selection component;
- and
- a sense amplifier coupled to the second digit line at a first sense node and configured to amplify a voltage difference between a voltage on the second digit line at the first sense node and the reference voltage at a second sense node, wherein the second sense node is coupled to a second driver that provides the reference voltage to the second sense node, and wherein the first driver is separate from the second driver.
An apparatus, comprising:
- a memory cell including first and second selection components;
- first and second digit lines coupled to the first and second selection components, respectively;
- a first driver configured to provide a reference voltage to the first selection component via the second digit line;
- a capacitor including first and second plates, the first plate coupled to the first selection component and configured to receive the reference voltage from the second digit line when the first selection component is activated;
- and
- a sense component coupled to the first digit line at a first sense node of the sense component, and wherein the sense component is configured to sense a voltage difference between the first sense node and a second sense node coupled to a second driver that provides the reference voltage to the second sense node, and wherein the second driver is separate from the first driver.
An apparatus comprising:
- a sense amplifier;
- a plurality of memory cells, each memory cell comprising first and second transistors and a capacitor between the first and the second transistors, the capacitor comprising a first plate and a second plate;
- a plurality of pairs of word lines, each of the plurality of pairs of word lines including first and second word lines, wherein the first word line of each of the plurality of pairs of word lines is configured to selectively couple a respective first plate of a respective memory cell, and wherein the second word line of each of the plurality of pairs of word lines is configured to selectively couple a respective second plate of the respective memory cell;
- a first digit line coupled to a first node of the sense amplifier and to each of the plurality of memory cells;
- a second digit line coupled to each of the plurality of memory cells, and wherein, a respective first transistor, a respective capacitor, and a respective second transistor of each memory cell is coupled in series between the first digit line and the second digit line;
- a first driver configured to provide a reference voltage to a second node of the sense amplifier;
- and
- a second driver configured to provide the reference voltage to the first digit line.
Dependencies are inferred from the claim text.