Techniques to adapt DC bias of voltage regulators for memory devices as a function of bandwidth demand
AssigneeIntel Corporation
InventorsSetul M. Shah, William Sheung, Dhruval J. Patel
Life of this patent
Estimating the term…
Abstract
Techniques to adapt the DC bias of voltage regulators for memory devices as a function of bandwidth demand are described. In one example, a non-volatile memory device includes a plurality of voltage regulator slices, wherein outputs of the plurality of voltage regulators slices are tied together to provide a voltage to perform operations on the array. The voltage regulator slices can be enabled or disabled based on a signal from a memory controller, such as an indication of an upcoming change in bandwidth demand for a rank including the memory device.
Claims17
A non-volatile memory device comprising:
- an array of memory cells;
- a plurality of voltage regulators, wherein outputs of the plurality of voltage regulators are tied together to provide a voltage to perform operations on the array;
- a register to indicate a mode of the non-volatile memory device;
- and
- logic to enable or disable one or more of the plurality of voltage regulators in response to modification of the register by a memory controller;
- wherein after modification of the register by the memory controller, the memory controller is to send requests to the non-volatile memory device at an adjusted bandwidth.
A memory module comprising:
- input/output (I/O) circuitry to couple with a memory controller;
- one or more non-volatile memory dies, each of the non-volatile memory dies including:
- an array of memory cells;
- a plurality of voltage regulators, wherein outputs of the plurality of voltage regulators are tied together to provide a voltage to perform operations on the array;
- a register to indicate a mode of the non-volatile memory die;
- and
- logic to enable or disable one or more of the plurality of voltage regulators in response to modification of the register by a memory controller;
- wherein after modification of the register by the memory controller, the memory controller is to send requests to the non-volatile memory die at an adjusted bandwidth.
A memory controller comprising:
- logic to:
- determine a bandwidth is to be adjusted for a non-volatile memory device, and
- based on the determination the bandwidth is to be adjusted program a register of the non-volatile memory device, the non-volatile memory device to enable or disable one or more of a plurality of voltage regulators based on the register, wherein outputs of the plurality of voltage regulators are tied together to provide a voltage to perform memory access operations;
- and
- input/output (I/O) circuitry to:
- send requests to the non-volatile memory device at the adjusted bandwidth.
Dependencies are inferred from the claim text.