Enhanced vector-based identification of circuit trojans

A system for analyzing a digital circuit design, the system comprising:

• a first processing circuit;
• a second processing circuit;
• and
• a third processing circuit,
• the first processing circuit being configured to form a record of value changes of a plurality of signals in the digital circuit design by performing a simulation simulating the digital circuit design during a simulated time interval to generate a test value change dump record, and by compiling the test value change dump record to generate the record of value changes including information about a number of value changes, during the simulated time interval, of each signal of the plurality of signals, the record of value changes further comprising, for each of the plurality of signals, a count of the number of value changes of the signal during the simulated time interval, the first processing circuit being further configured to convert the record of value changes of the plurality of signals to a value change matrix, and to transform the value change matrix by performing dimensionality reduction to generate transformed data;
• the third processing circuit being configured to:
• generate an enlarged data set from a first plurality of training digital circuit designs;
• train an autoencoder with the enlarged data set;
• and
• copy a weight from an artificial neuron of the autoencoder to a corresponding artificial neuron of a first discriminative neural network;
• and
• the second processing circuit being configured to:
• instantiate the first discriminative neural network;
• feed the transformed data to the first discriminative neural network;
• and
• determine, by operating the first discriminative neural network, whether the digital circuit design has intermittent defects.