System architecture with query based address translation for access validation
AssigneeArm Limited
InventorsTessil Thomas, Jamshed Jalal, Andrea Pellegrini, Anitha Kona
Life of this patent
Estimating the term…
Loading patent…
AssigneeArm Limited
InventorsTessil Thomas, Jamshed Jalal, Andrea Pellegrini, Anitha Kona
Estimating the term…
An apparatus includes a first device configured to generate a transaction request targeted to a first address, a switch, coupled to the first device and configured to the route the transaction request, a port coupled to the peripheral switch and the data processing network, and a system memory management unit, coupled to the port. The system memory management unit is configured for receiving an address query for the first address from the peripheral port translating the first address to a second address, accessing attributes of a device associated with the second address and responding to the query. Access validation for the transaction request is confirmed or denied dependent upon the second address and the attributes of the device associated with the second address. The first device may be a peripheral device, the switch may be a peripheral switch and the port may be a peripheral port.
A method for access validation in a data processing system comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.