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US 10,853,235 B2Granted
Memory controller and memory system having the same
AssigneeSK hynix Inc.
InventorJeen Park
Life of this patent
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Abstract
A memory controller for use in a memory system includes: a central processing unit configured to generate commands in response to a request received from a host; and a queue controller configured to queue the commands in order of similar operation times.
Claims3
A memory controller comprising:
- an operation table configured to store operation information on various operations;
- a command queue controller configured to match commands performed in the same memory device according to an address, and queue the matched commands, based on the operation information;
- and
- a command register configured to sequentially store and output the queued commands,
- wherein the operation table includes program operation information, read operation information, and erase operation information,
- wherein the read operation information includes information on logical pages, and
- wherein the information on logical pages includes least significant bit (LSB) information, central significant bit (CSB) information, and most significant bit (MSB) information.
4 more elements
Dependencies are inferred from the claim text.