Tamper-proof, dual-boot information handling system having operating system-specific hardware and/or firmware components

An Information Handling System (IHS), comprising:

• a chip select circuit;
• a first flash memory coupled to the chip select circuit;
• a second flash memory coupled to the chip select circuit;
• and
• an Embedded Controller (EC) coupled to the chip select circuit, wherein the EC is configured to:
• in a default mode of operation, (a) use the chip select circuit to set the second flash memory active and set the first flash memory inactive, and (b) perform a default boot procedure using the second flash memory;
• and
• in an alternate mode of operation, (a) use the chip select circuit to set the second flash memory inactive and set the first flash memory active, and (b) perform an alternate boot procedure using the first flash memory, wherein to use the chip select circuit, the EC is configured to apply a Real-Time Clock (RTC) battery-powered General-Purpose Input/Output (GPIO) control or external latch circuit to the chip select circuit.

A hardware memory device having program instructions stored thereon that, upon execution by an Embedded Controller (EC) of an Information Handling System (IHS), cause the IHS to:

• apply a Real-Time Clock (RTC) battery-powered General-Purpose Input/Output (GPIO) control to the chip select circuit;
• in a default mode of operation, (a) use a chip select circuit to set a second flash memory active and set a first flash memory inactive, and (b) perform a default boot procedure using the second flash memory;
• and
• in a diagnostic mode of operation, (a) use the chip select circuit to set the second flash memory inactive and set the first flash memory active, and (b) perform a diagnostic boot procedure using the first flash memory.