Processor and pipelining method
AssigneeSanken Electric Co., Ltd.
InventorsKazuhiro Mima, Hitomi Shishido
Life of this patent
Estimating the term…
Abstract
A processor is disclosed that performs pipelining which processes a plurality of threads and executes instructions in concurrent processing, the instructions corresponding to thread numbers of the threads and including a branch instruction. The processor may include a pipeline processor, which includes a fetch part that fetches the instruction of the thread having an execution right, and a computation execution part that executes the instruction fetched by the fetch part. The processor may include a branch controller that determines whether to drop an instruction subsequent to the branch instruction within the pipeline processor based on the thread number of the thread where the branch instruction is executed and on the thread number of the subsequent instruction.
Claims6
A processor that performs pipelining which processes a plurality of threads and executes instructions in concurrent processing, the instructions corresponding to thread numbers of the threads and including a branch instruction, the processor comprising:
- a pipeline processor comprising
- a fetch part that fetches the instruction of the thread having an execution right, and
- a computation execution part that executes the instruction fetched by the fetch part;
- and
- a branch controller that determines whether to drop an instruction subsequent to the branch instruction within the pipeline processor based on the thread number of the thread where the branch instruction is executed and on the thread number of the subsequent instruction.
A pipelining method of processing a plurality of threads and executing instructions in concurrent processing, the instructions corresponding to thread numbers of the threads and including a branch instruction, the method comprising:
- performing pipelining that fetches the instruction of the thread having an execution right and executes the instruction fetched;
- and
- performing branch control to determine whether to drop an instruction subsequent to the branch instruction within the pipelining based on the thread number of the thread where the branch instruction is executed and on the thread number of the subsequent instruction.
Dependencies are inferred from the claim text.