Handling Instruction Data and Shared resources in a Processor Having an Architecture Including a Pre-Execution Pipeline and a Resource and a Resource Tracker Circuit Based on Credit Availability

A processor comprising:

• a pre-execution instruction pipeline sharing a plurality of shared resources of one or more resource types, the pre-execution instruction pipeline including:
• a decoder;
• a resource matcher circuit;
• a resource tracker circuit having a plurality of hardware credit unit storage elements, each of the plurality of hardware credit unit storage elements associated with an availability of a corresponding shared resource of the plurality of shared resources;
• and
• an electrical connection between the decoder and the resource matcher circuit to communicate a shared resource requirement,
• the pre-execution instruction pipeline being operable to:
• decode instruction data to determine the shared resource requirement, the shared resource requirement indicating a first shared resource of the plurality of shared resources and a required credit value required for the instruction data;
• check the resource tracker circuit for a first credit value stored in a first hardware credit unit storage element of said hardware credit unit storage elements, the first hardware credit unit storage element corresponding to the first shared resource, by using the resource matcher circuit having a combinational gate circuit including at least one redundant path for avoiding glitches in an output of the resource matcher circuit;
• determine that the first shared resource is available based on the first credit value stored in the first hardware credit unit storage element and the required credit value indicated in the shared resource requirement;
• upon determining that the first shared resource is available:
• dispatch the instruction data to the first shared resource among the plurality of shared resources;
• and
• generate a first signal to update the first credit value stored in the first hardware credit unit storage element;
• and
• update the first credit value stored in the first hardware credit unit storage element to indicate the first shared resource is available when the first shared resource is no longer used by the instruction data.

A resource manager circuit of a processor integrated circuit, the processor integrated circuit having an instruction decoder and a plurality of shared resources of one or more resource types, the resource manager circuit comprising a resource tracker circuit, the resource manager circuit further including:

• a plurality of hardware credit unit storage elements, each of the plurality of hardware credit unit storage elements associated with an availability of a corresponding shared resource of the plurality of shared resources;
• a resource matcher circuit configured to:
• receive a shared resource requirement signal from the instruction decoder, the shared resource requirement signal indicating a first shared resource of the plurality of shared resources and a required credit value required for instruction data;
• and
• receive a resource availability signal from the resource tracker circuit;
• and
• a combinational gate circuit to perform a determination of whether or not the shared resource requirement signal matches the resource availability signal, the combinational gate circuit including at least one redundant path for avoiding glitches in an output of the resource matcher circuit;
• the resource manager circuit being operable to:
• check the resource tracker circuit for a first credit value stored in a first hardware credit unit storage element of said hardware credit unit storage elements, the first hardware credit unit storage element corresponding to the first shared resource of the plurality of shared resources;
• determine that the first shared resource is available based on the first credit value stored in the first hardware credit unit storage element and the required credit value indicated in the shared resource requirement signal;
• upon determining that the first shared resource is available:
• dispatch the instruction data to the first shared resource among the plurality of shared resources;
• and
• generate a first signal to update the first credit value stored in the first hardware credit unit storage element;
• and
• update the first credit value stored in the first hardware credit unit storage element to indicate the first shared resource is available when the first shared resource is no longer used by the instruction data;
• and
• a pulse generator circuit electrically connected to a clock and to the resource matcher circuit and being operable to prevent the resource matcher circuit from performing a subsequent determination for a given period of time after the determining that the first shared resource is available.