Power management integrated circuit with in situ non-volatile programmability
AssigneeMicron Technology, Inc.
InventorMatthew David Rowley
Life of this patent
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AssigneeMicron Technology, Inc.
InventorMatthew David Rowley
Estimating the term…
Disclosed is a power management integrated circuit including dual one-time programmable memory banks and methods for controlling the same. In one embodiment, the power management integrated circuit (PMIC) includes a first one-time programmable (OTP) memory bank; a second OTP memory bank; and access control logic, communicatively coupled to the first OTP bank and the second OTP bank, the access control logic configured to: utilize the first OTP memory bank for operation of the PMIC upon detecting that the second OTP memory bank is empty, write data to the second OTP memory bank in response to a write request from a host application if the second OTP memory bank is not empty, and utilize the second OTP memory bank for operation of the PMIC upon detecting that the second OTP memory bank is not empty.
A power management integrated circuit (PMIC) comprising:
A method comprising:
Dependencies are inferred from the claim text.