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US 10,852,762 B2Granted
Inter-via conductive path routing
AssigneeWestern Digital Technologies, Inc.
InventorJohn E. Maroney
Life of this patent
Estimating the term…
Abstract
An electrical board includes a ground layer, a power layer, a first signal layer, a top surface, first and second vias that extend substantially perpendicularly to the top surface through the ground layer, the power layer and the first signal layer, and one or more conductive traces disposed in the first signal layer, the one or more conductive traces lying between the first and second vias.
Claims18
An electrical board comprising:
- a ground layer;
- a power layer;
- a first signal layer;
- a top surface comprising:
- a first surface portion configured to have a first electrical module directly mounted thereto;
- a second surface portion configured to have a second electrical module directly mounted thereto;
- and
- a third surface portion disposed between the first surface portion and the second surface portion and configured to have a third electrical module directly mounted thereto, the third electrical module having a longitudinal dimension;
- first, second, and third staggered rows of vias arranged in the longitudinal dimension that extend substantially perpendicularly to the top surface through the ground layer, the power layer and the first signal layer, the first, second, and third rows of vias being configured to be electrically coupled to corresponding rows of pins of the third electrical module, wherein:
- the first and second rows of vias are adjacent to one another and relatively offset in the longitudinal dimension;
- and
- the second and third rows of vias are adjacent to one another and relatively offset in the longitudinal dimension;
- and
- first and second conductive traces disposed in the first signal layer, wherein:
- the first and second conductive traces are routed between adjacent vias of the first row of vias;
- the first conductive trace contacts and is routed through a via of the second row of vias and continues from the via of the second row of vias through the third surface portion to the second surface portion;
- and
- the second conductive trace is routed between the via of the second row of vias and an adjacent via of the second row of vias and contacts and is routed through a via of the third row of vias that is offset from the via of the second row of vias in the longitudinal dimension.
15 more elements
A computing system comprising:
- a printed circuit board (PCB) having a ground layer, a power layer and a signal layer disposed between the ground layer and the power layer;
- a first electrical module mounted to a top surface of the PCB;
- a second electrical module mounted directly to the top surface of the PCB;
- and
- a third electrical module having a length dimension and a width dimension, the third electrical module being mounted to the top surface of the PCB at least partially between the first electrical module and the second electrical module with respect to the width dimension, the third electrical module being electrically coupled to first, second, and third staggered rows of vias integrated with the PCB and arranged in the length dimension;
- wherein:
- the PCB is configured to transmit signals from the first electrical module to the second electrical module in the signal layer over first and second conductive traces that are routed between adjacent vias of the first row of vias;
- the first conductive trace contacts and is routed through a via of the second row of vias;
- and
- the second conductive trace is routed between the via of the second row of vias and an adjacent via of the second row of vias and contacts and is routed through a via of the third row of vias that is offset from the via of the second row of vias in the length dimension.
7 more elements
A method of managing data communication in a computing device, the method comprising:
- providing a printed circuit board (PCB) having a ground layer, a power layer, a signal layer disposed between the ground layer and the power layer, and first, second, and third staggered rows of vias electrically coupled to a first electrical module mounted on a top surface of the PCB;
- and
- transmitting signals from a second electrical module mounted on the top surface of the PCB to a third electrical module mounted directly on the top surface of the PCB over first and second conductive traces in the signal layer;
- wherein:
- the first and second conductive traces pass under the first electrical module;
- the first and second conductive traces are routed between adjacent vias of the first row of vias;
- the first conductive trace contacts and is routed through a via of the second row of vias;
- and
- the second conductive trace is routed between the via of the second row of vias and an adjacent via of the second row of vias and contacts and is routed through a via of the third row of vias that is offset from the via of the second row of vias.
6 more elements
Dependencies are inferred from the claim text.