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US 10,852,756 B2Granted
Low dropout voltage regulator integrated with digital power gate driver
AssigneeIntel Corporation
InventorsKosta Luria, Alexander Lyakhov, Joseph Shor, Michael Zelikson
Life of this patent
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Abstract
Described is an apparatus which comprises: a first power supply node to supply input power supply; a power transistor coupled to the first power supply node; a multiplexer to selectively control gate terminal of the power transistor according to whether the power transistor is to operate as part of a low dropout voltage regulator (LDO-VR) or is to operate as a digital switch; and a second power supply node coupled to the power transistor, the second power supply node to provide power supply to a load from the power transistor.
Claims21
An apparatus comprising:
- a transistor coupled to a first power supply node, wherein the transistor is directly coupled to a second power supply node, wherein a load is connected to the second power supply node;
- a multiplexer to select one of a first control and to couple the first control to a gate of the transistor, or a second control and to couple the second control to the gate of the transistor, wherein the second control is determined according to a voltage condition on the second power supply node;
- and
- a diode-connected transistor coupled to the first power supply node and the multiplexer via the second control, wherein the diode-connected transistor is coupled in parallel to a bias transistor.
1 more element
An apparatus comprising:
- a transistor coupled to a first power supply node, wherein the transistor is directly coupled to a second power supply node, and wherein a load is to be connected to the second power supply node;
- and
- a multiplexer coupled to the transistor, wherein an output of the multiplexer is to operate the transistor as one of:
- a digitally controlled power gate;
- or
- an analog controlled transistor which is part of a regulation circuitry;
- and
- a diode-connected transistor coupled to the first power supply node and an input of the multiplexer.
5 more elements
A system comprising:
- a memory;
- a processor coupled to the memory, the processor having an apparatus which comprises:
- a power control unit;
- and
- a plurality of processing cores coupled to the power control unit, wherein the plurality of processing cores includes a processor core;
- a transistor coupled to a first power supply node, wherein the transistor is directly coupled to a second power supply node, wherein the processor core is coupled to the second power supply node;
- and
- a selector circuitry coupled to the transistor, wherein an output of the selector circuitry is controllable by the power control unit such that the selector circuitry is to operate the transistor as one of:
- a digitally controlled power gate;
- or
- an analog controlled transistor which is part of a regulator;
- and
- a diode-connected transistor coupled to the first power supply node and an input of the selector circuitry;
- and
- a wireless interface to communicatively couple the processor to another device.
12 more elements
An apparatus comprising:
- a plurality of devices coupled to a first power supply rail, wherein the plurality of devices is directly coupled a second power supply rail, wherein the plurality of devices are implemented as flipped source followers;
- a selection circuitry to select one of a first control or a second control as input to the plurality of devices to control the plurality of devices;
- a first circuitry comprising a buffer to generate the first control to mitigate droop on the second power supply rail;
- and
- a second circuitry to compare voltage on the second power supply rail with a reference, and to generate the second control according to a comparison of the voltage on the second power supply rail against the reference, wherein the second circuitry includes a diode-connected transistor coupled to the first power supply rail and an input of the selection circuitry.
2 more elements
Dependencies are inferred from the claim text.