High speed radar test system processing and logic

A programmable input/output (I/O) controller coupled to a radar test computing system and comprising a programmable logic device to:

• reset status data values related to timing of radio frequency (RF) pulses received on a RF signal from a radar system under test with respect to a moving target, wherein the status data values comprise at least values for a running time, an elapsed time, and pre-pulse counts;
• in response to detection of an arm message from the radar test computing system, monitor for one of a start message or a stop message;
• in response to receipt of the start message from the radar test computing system, set the running time to a current time and the elapsed time to zero;
• and
• in response to reaching a timeout period before detecting a first qualified pulse on the RF signal from the radar system:
• update a value for the elapsed time;
• increment a value for the pre-pulse counts;
• send values for the elapsed time and pre-pulse counts to the radar test computing system;
• and
• send an update request to the radar test computing system to request values of a frequency shift, a signal delay, and a signal attenuation for the first qualified pulse anticipated within a subsequent timeout period, wherein the frequency shift is to simulate speed of the moving target, the signal delay to simulate a distance from the moving target, and the signal attenuation is to simulate an amount of atmospheric propagation loss.

A method comprising:

• coupling a host interface, of a radar test computing system, to a programmable input/output (I/O) controller, wherein the programmable I/O controller is to interface with propagation path replicator (PPR) circuitry that is to simulate a moving target for a radar system under test;
• receiving, by the radar test computing system from a signal analyzer circuit, a start message indicative of a start pulse detected by the signal analyzer circuit, which is coupled to the radar test computing system and to the PPR circuitry, wherein the start pulse is to trigger initiation of a test scenario;
• receiving, by the radar test computing system, an update request from the programmable I/O controller in response to detection, by the PPR circuitry, of a first radio frequency (RF) pulse on a RF signal received from the radar system;
• retrieving, by the radar test computing system from a storage disk, scenario data associated with distance to and speed of the moving target for a second RF pulse expected to follow the first RF pulse;
• calculating, by a processing device of the radar test computing system, using retrieved scenario data, values of a frequency shift, a signal delay, and a signal attenuation for the second RF pulse;
• and
• sending, by the radar test computing system, during a time period between the first RF pulse and the second RF pulse, the values of the frequency shift, the signal delay, and the signal attenuation to the programmable I/O controller for use by the PPR circuitry to simulate the moving target for the second RF pulse.