Method of making ohmic contact on low doped bulk silicon for optical alignment
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuei-Sung Chang, Chia-Hua Chu, Shang-Ying Tsai
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Abstract
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip including an epitaxial layer overlying a microelectromechanical systems (MEMS) substrate. The method includes bonding a MEMS substrate to a carrier substrate, the MEMS substrate includes monocrystalline silicon. An epitaxial layer is formed over the MEMS substrate, the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts are formed over the epitaxial layer, the plurality of contacts respectively form ohmic contacts with the epitaxial layer.
Claims20
A method for manufacturing a microelectromechanical systems (MEMS) structure, the method comprising:
- bonding a MEMS substrate to a carrier substrate, wherein the MEMS substrate comprises monocrystalline silicon;
- forming an epitaxial layer over the MEMS substrate, wherein the epitaxial layer has a higher doping concentration than the MEMS substrate;
- and
- forming a plurality of contacts over the epitaxial layer, wherein the plurality of contacts respectively from ohmic contacts with the epitaxial layer.
A method for manufacturing an integrated chip, the method comprising:
- forming a plurality of alignment regions over a first substrate;
- bonding the first substrate to a second substrate to form a cavity between the first substrate and the second substrate;
- performing a thinning process on the second substrate;
- forming an epitaxial layer over the second substrate, wherein the epitaxial layer has a higher doping concentration than the second substrate;
- forming a plurality of contacts over a top surface of the epitaxial layer, wherein the forming process includes aligning the plurality of contacts over the first substrate by virtue of the plurality of alignment regions by using near-infrared (NIR) light illuminated from the top surface of the epitaxial layer to the plurality of alignment regions;
- and
- performing an etching process to remove a portion of the second substrate and the epitaxial layer directly above the cavity and define at least one movable element, wherein a first subset of the plurality of contacts are directly over the at least one movable element.
A method for manufacturing an integrated chip, the method comprising:
- forming a plurality of alignment marks on a carrier substrate;
- bonding the carrier substrate to a microelectromechanical systems (MEMS) substrate to form a cavity between the carrier substrate and the MEMS substrate, wherein the bonding process includes aligning the MEMS substrate over the carrier substrate by virtue of the plurality of alignment marks by using infrared (IR) light;
- performing a thinning process on the MEMS substrate;
- forming an epitaxial layer over the MEMS substrate such that a resistance of the of the epitaxial layer is less than a resistance of the MEMS substrate;
- forming a plurality of contacts over a top surface of the epitaxial layer, wherein forming the plurality of contacts includes aligning the plurality of contacts over the carrier substrate by virtue of the plurality of alignment marks by using IR light illuminated from the top surface of the epitaxial layer to the plurality of alignment marks;
- performing an etching process to remove a portion of the MEMS substrate and the epitaxial layer above the cavity and form at least one movable element, wherein a first subset of the plurality of contacts are directly over the at least one movable element;
- and
- bonding the plurality of contacts to an interconnect structure of an integrated circuit (IC) die.
Dependencies are inferred from the claim text.